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US 5,393,677 AGranted
Method of optimizing wells for PMOS and bipolar to yield an improved BICMOS process
AssigneeIntegrated Device Technology, Inc.
InventorsChuen-Der Lien, Kyle W. Terrill, Jeong Y. Choi
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Abstract
A first process embodiment of the present invention comprises the steps of implanting a blanket low dose n-well implant before field oxidation. A blanket n-type punchthrough suppression implant precedes the field oxidation step. After field oxidation, an implantation masking step is used to adjust the doping for the p-well in its active and field regions.
Claims1
A semiconductor process, comprising the steps of:
- oxidizing a surface of a wafer;
- implanting a blanket n-well implant in said wafer through said oxidized wafer surface before any field oxidation of said wafer;
- diffusing said n-well implant in said wafer;
- depositing nitride layers on said wafer surface;
- masking said wafer with an island-like pattern of photoresist;
- etching said nitride layers into patterned islands of nitride;
- stripping any remaining portions of said photoresist on said wafer;
- oxidizing said surface of said wafer;
- stripping away any remaining portions of said nitride layers;
- masking with another photoresist patterened for placing a p-well and a field oxide in said wafer;
- implanting said p-well implant in said wafer wherein a retrograded p-well is formed;
- field implanting said field oxide in said wafer;
- stripping away any remaining portions of said photoresist off said wafer;
- implanting an n-type punch through suppression implant in said wafer.
11 more elements
Dependencies are inferred from the claim text.