High speed bus system
AssigneeRambus Inc.
InventorsMark A. Horowitz, Winston K. M. Lee
Life of this patent
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AssigneeRambus Inc.
InventorsMark A. Horowitz, Winston K. M. Lee
Estimating the term…
In the high speed bus system of the present invention, the bus configuration is one in which all master devices are clustered at one end of an unterminated end of the bus. The slaves are located along the remaining length of the bus and the opposite end of the transmission line of the bus is terminated. By eliminating the termination resistor at the end of the bus where the master devices are located the required drive current needed to produce a given output swing is reduced. The bus drivers and receivers are CMOS integrated circuits. The bus of the present invention is operable utilizing small swing signals which enable sufficient implementation of current mode drivers for low impedance bus signals. In particular, the bus input receiver of the present invention comprises a two stage buffered sampler/amplifier which receives a small swing signal from the bus and samples and amplifies the low swing signal to a full swing signal within a single clock cycle using CMOS circuits.
A high speed bus system for coupling at least one master device to at least one slave device, said bus comprising at least one transmission line for transmission of signals, said master device and said slave device coupled to the transmission line;
A high speed bus system for coupling at least one master device to at least one slave device, said bus comprising at least one low impedance transmission line for transmission of signals, said master device and said slave device coupled to the at least one transmission line;
In a high speed bus system for coupling at least one master device to at least one slave device, said bus comprising at least one transmission line for transmission of signals, said master device and said slave device coupled to the at least one transmission line a method for transmitting signals between a transmitting device and a receiving device of the master and slave devices, said method comprising the steps of:
A high speed bus configuration for coupling at least one master device to at least one slave device, said bus comprising:
Dependencies are inferred from the claim text.