Computer graphics display system having combined bus and priority reading of video memory

A graphics display system for a computer comprising:

• (a) a display memory having a dynamic random access memory (DRAM) port and a serial port,
• (b) a video controller including a host graphics controller having a bus port, a lookup table and a digital-to-analog converter for receiving lookup table data from the lookup table and converting it into signals reproducible by a display, and a register means for receiving said data as serial data from the serial port of the display memory on said combined bus and for providing said data to the lookup table,
• (c) the DRAM and serial ports being multiplexed to a combined bus, the combined bus being connected to the bus port of the host graphics controller,
• (d) the lookup table having an input for receiving data from the combined bus,
• (e) means for causing passage of serial data along the bus from the display memory in higher priority than any other data for provision of display data to the lookup table whereby said lookup table provides said lookup table data to the digital-to-analog converter.