Image data conversion circuit having a vertical filter for preventing deterioration in quality of a reduced image

An image date conversion circuit comprising:

• a first decimation circuit for receiving a plurality of original lines of an original image to be reduced, a first number of said original lines being arranged in a first direction to form said original image, each of said original lines consisting of a second number of original dots which are arranged in a second direction which is perpendicular to said first direction, and for outputting reduced lines each consisting of a third number of reduced dots which are arranged in said second direction, said third number being smaller than said second number;
• and
• a second decimation circuit for receiving a plurality of said reduced lines and for outputting a fourth number of determined reduced lines which are arranged in said first direction to form a reduced image, said fourth number being smaller than said first number, wherein said second decimation circuit comprises a line memory which is formed of a plurality of memory elements each capable of storing one of said reduced lines, a sum of memory capacities of said memory elements being sufficiently large to store one of said original lines, wherein said line memory is partitioned into a first portion which includes at least one of said memory elements and a second portion which includes at least one of said memory elements and which is disposed before said first portion, wherein when a reduction ratio of a size of said reduced image to a size of said original image is larger than a predetermined value, said second portion is combined with said first portion so as to serially store said reduced lines, and wherein when said reduction ratio is equal to or smaller than said predetermined value, said second portion filters said reduced lines to obtain filtered reduced lines and said first portion serially stores said filtered reduced lines.