Differential fuse circuit and method utilized in an analog to digital converter

A differential fuse circuit comprising:

• a first fuse and a second fuse each coupled to a supply potential;
• circuitry for blowing said first fuse coupled to said first fuse;
• circuitry for blowing said second fuse coupled to said second fuse;
• a differential sense circuit including a first field effect transistor coupled to said first fuse and a second field effect transistor coupled to said second fuse;
• a bias circuit, an output of said bias circuit coupled to a gate of said first field effect transistor and to a gate of said second field effect transistor;
• a current mirror circuit comprising a third field effect transistor coupled between said first field effect transistor and a reference potential and a fourth field effect transistor coupled between said second field effect transistor and said reference potential wherein a current flowing through said third field effect transistor will induce a current in said second field effect transistor;
• and
• an inverter, an input of said inverter coupled between said second field effect transistor and said fourth field effect transistor whereby an output of said inverter is at a potential substantially near said reference potential when said first fuse has a resistance less than said second fuse and said output node is at a potential substantially near said supply potential when said first fuse has a resistance greater than said second fuse.

A method of forming a fuse comprising the steps of:

• providing a first fuse and a second fuse each coupled to a supply potential;
• providing circuitry for blowing said first fuse coupled to said first fuse;
• providing circuitry for blowing said second fuse coupled to said second fuse;
• providing a current mirror, said current mirror including a first leg and a second leg wherein a current flowing in said first leg will induce a current in said second leg, said first leg coupled between said first fuse and a reference potential and said second leg coupled between said second fuse and said reference potential;
• and
• blowing one of said first fuse or said second fuse such that an output node between said second fuse and said second leg of said current mirror is at a potential substantially near said reference potential when said first fuse has a resistance greater than said second fuse and such that said output node is at a potential substantially near said supply potential when said first fuse has a resistance less than said second fuse.

An analog-to-digital converter circuit comprising:

• an array of primary capacitors connected in parallel, each said primary capacitors comprising a top plate and a bottom plate;
• a comparator including an input coupled to said primary capacitor top plate;
• an array of binary weighted error correcting capacitors, each said error correcting capacitors comprising a top plate and a bottom plate, said top plate of said error correcting capacitors coupled to said top plate of said primary capacitors through an attenuation capacitor;
• an array of fuse circuits, each said fuse circuits associated with one of said error correcting capacitors and coupled to said associated error correcting capacitor through a switch, each said fuse circuits comprising:
• first and second fuses coupled to a supply potential;
• a current mirror comprising a first leg and a second leg wherein a current through said first leg will induce a current in said second leg, said first leg coupled between said first fuse and a reference potential and said second leg coupled between said second fuse and said reference potential;
• and
• an output node between said second fuse and said second leg of said current mirror whereby said output node is at a potential substantially near said reference potential when said first fuse has a resistance greater than said second fuse and said output node is at a potential substantially near said supply potential when said first fuse has a resistance less than said second fuse;
• and
• a successive approximation logic switch control circuit for generating a successive approximation logic signal such that each of said error correcting capacitors is selectively switched to obtain a desired capacitor value on said primary capacitor top plate.

A differential fuse circuit comprising:

• a first fuse having first and second terminals, said first terminal coupled to a supply potential;
• circuitry for blowing said first fuse coupled to said first fuse;
• a second fuse having first and second terminals, said first terminal coupled to said supply potential;
• circuitry for blowing said second fuse coupled to said second fuse;
• and
• a current mirror comprising a first leg and a second leg wherein a current through said first leg will induce a current in said second leg, said first leg coupled between said second terminal of said first fuse and a reference potential and said second leg coupled between said second terminal of said second fuse and said reference potential.

A differential fuse circuit comprising:

• a first fuse coupled to a supply potential;
• a second fuse coupled to said supply potential;
• circuitry for blowing said first fuse coupled to said first fuse;
• circuitry for blowing said second fuse coupled to said second fuse;
• and
• a current mirror comprising a first leg and a second leg wherein a current through said first leg will induce a current in said second leg, said first leg coupled between said first fuse and a reference potential and said second leg coupled between said second fuse and said reference potential wherein the difference between said reference potential and said supply potential is about five volts.

A differential fuse circuit comprising:

• a first fuse coupled to a supply potential;
• a second fuse coupled to said supply potential;
• circuitry for blowing said first fuse coupled to said first fuse;
• circuitry for blowing said second fuse coupled to said second fuse;
• a current mirror comprising a first leg and a second leg wherein a current through said first leg will induce a current in said second leg, said first leg coupled between said first fuse and a reference potential and said second leg coupled between said second fuse and said reference potential;
• and
• an inverter coupled between said second fuse and said second leg.

A differential fuse circuit comprising:

• a first fuse coupled to a supply potential, said first fuse having an initial resistance between about 100 and 200 ohms;
• a second fuse coupled to said supply potential, said second fuse having an initial resistance between about 100 and 200 ohms;
• circuitry for blowing said first fuse coupled to said first fuse;
• circuitry for blowing said second fuse coupled to said second fuse;
• a current mirror comprising a first leg and a second leg wherein a current through said first leg will induce a current in said second leg, said first leg coupled between said first fuse and a reference potential and said second leg coupled between said second fuse and said reference potential.