Voltage compensating delay element
AssigneeMicron Semiconductor, Inc.
InventorsStephen L. Casper, Daniel R. Loughmiller
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Abstract
A signal-delaying capacitive circuit applied to a node in a microcircuit device is immunized against the variation of the supply voltage by a metal-oxide semiconductor connected in series between the node and the signal-delaying capacitive circuit. The gate of the semiconductor is biased with a voltage signal proportional to the supply voltage, whereby the resistance of the semiconductor is increased as the supply voltage decreases; thus, isolating the capacitive circuit from the node and reducing the delay.
Claims8
In an electronic circuit having a signal path comprising a series of inverters biased by a supply voltage in which a delaying capacitive element is connected in a shunt path at an intermediate node along said signal path at which said signal is being delayed, said shunt path containing said capacitive element between said intermediate node and a reference point, an improvement for compensating for variations in the delaying effect of said capacitive element as a result of variations in the circuit supply voltage, said improvement comprising:
- a controllable resistance element connected in said shunt path in series with said capicitive element between said intermediate node and said reference point;
- said resistance element having a resistivity controllable by said bias voltage wherein said resistivity increases and said delaying effect at said node increases when said bias voltage is increased;
- and
- means for generating said bias voltage as a function of said supply voltage wherein said bias voltage is increased as the supply voltage increases.
Dependencies are inferred from the claim text.