US 5,352,635 AGranted

Silicon accelerometer fabrication method

OwnerXiang-Zheng Tu, Yun-Yan Liinventors

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Abstract

A silicon accelerometer comprising a substrate, one or more pairs of beams, a pedestal, a mass on top of the pedestal and a cavity beneath the pedestal all of which is formed by a single-sided processing method. The pedestal is suspended over the cavity by the beams which provides the only support for the pedestal. The beams are supported by the substrate. The main steps of fabricating this structure comprise diffusion or ion implantation and epitaxial growth to form a buried high donor concentration layer on the surface of the substrate, chemical vapor deposition and photoetching to expose a portion of the edge of the buried layer to the ambiente, anodization to convert the high donor concentration layer into porous silicon and selectively etching to remove the porous silicon.

Claims19

Dependent claims

A process for fabricating a silicon accelerometer comprising the steps of:

providing a low donor concentration silicon substrate,
forming a high donor concentration silicon layer in a predetermined region on the surface of the substrate by diffusion or ion implantation,
forming a low donor concentration silicon layer over the surface of said substrate by vapor phase epitaxy,
forming at least one opening in said low donor concentration layer thereby exposing edges of said high donor concentration layer,
after said forming at least one opening, converting said high donor concentration layer into porous silicon by anodization, said converting of said high donor concentration layer being bounded by said exposed edges of said high donor concentration layer,
mounting a mass onto the low donor concentration layer,
removing the porous silicon by etching between the substrate and the low donor concentration layer to form a cavity between the substrate and the low donor concentration layer, said etching resulting in a complete removal of the porous silicon.

4 more elements

Dependencies are inferred from the claim text.

Facts

Application: 08/010,500Filed 28 Jan 1993 · continuation
Priority: CN 90103465.712 Jul 1990
Granted: 4 Oct 1994
Term ends: Not estimatedThe source records don’t support an estimate.

Classification6 codes

G01P 15/0802
With conversion into electric or magnetic values: details
G01P 15/123
By alteration of electrical resistance: by piezo-resistive elements, e.g. semiconductor strain gauges
G01P 2015/084
For defining out-of-plane movement of the mass: the mass being suspended at more than one of its sides, e.g. membrane-type suspension, so as to…
Y10S 438/96
Semiconductor device manufacturing: process: porous semiconductor

Family

Serial830,560Parent of this continuation · filed 12 Jul 1991
US 5,352,635 AThis patent

From the US filing history. Foreign family members aren’t listed.

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