High power MOS device with protective circuit against overcurrent or the like
AssigneeNEC Corporation
InventorYukimasa Koishikawa
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AssigneeNEC Corporation
InventorYukimasa Koishikawa
Estimating the term…
This invention relates to an improvement of a high power mos device which includes a plurality of power MOSFETs whose drain regions and source regions are respectively connected in common with each other and respectively receive on-off control voltages to the respective gate regions, and circuits for generating the control voltages. When short-circuiting occurs between the gate and the source in either of these power MOSFETs, a gate current detection and interruption circuit is inserted between a control voltage source and the gate so as to interrupt the supply of the control voltage to the gate. With such an arrangement it becomes possible to dissolve adverse effect due to the short-circuiting between the gate and the source, which was not possible in the prior device of this kind, and to improve the reliability of the monolithic power MOSIC device.
A power MOS device comprising a plurality of MOS transistors each having a first electrode serving as one of source and drain thereof and connected to a first terminal, a second electrode serving as the other of said source and drain and connected to a second terminal and a gate electrode, a drive circuit producing a drive signal at an output node thereof, said drive signal having a first level that renders each of said MOS transistors conductive and a second level that renders each of said MOS transistors nonconductive, and a plurality of current detection and interrupt circuits each connected between said output node of said drive circuit and said gate electrode of an associated one of said MOS transistors, each of said current detection and interrupt circuits including a resistor inserted in series into a signal path for transferring said drive signal from said output node of said drive circuit to said gate electrode of said associated one of said MOS transistors, detection means coupled to said resistor and responsive to a voltage produced by said resistor for detecting whether or not a current due to a short circuit between said gate and first electrodes of said associated one of said MOS transistors flows through said resistor, and interrupt means coupled to said detection means for preventing said drive signal from being transferred from said output node of said drive circuit to said gate electrode of said associated one of said MOS transistors when said detection means detects that said current due to said short circuit flows through said resistor, said associated one of said MOS transistors being thereby kept into a nonconductive state irrespective of said drive signal.
Dependencies are inferred from the claim text.