Multipurpose bus interface utilizing a digital signal processor
AssigneeThe United States of America as represented by the Secretary of the Navy
InventorChristian L. Houlberg
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AssigneeThe United States of America as represented by the Secretary of the Navy
InventorChristian L. Houlberg
Estimating the term…
A multipurpose bus interface comprising a digital signal processor which eives a clock signal and control signals from a Manchester type encoder/decoder and then processes the clock and control signals allowing for the serial transfer of data to and from the 1553 multiplex data bus, the encoder/decoder and the digital signal processor into an IC memory card for storage in or retrieval from the IC memory card. Software stored in an electrically erasable programmable read only memory controls how the data is transferred and interpreted making it easier to modify the digital signal processor's operation to accommodate its use with different bus standards and data protocols/formats. The encoder/decoder of the present invention formats and protocols data transferred from the electrically erasable programmable read only memory to the 1553 multiplex data bus as well data transferred from the 1553 multiplex data bus to the memory, as appropriate. The multipurpose bus interface of the present invention also includes an RS-232 interface and an RS-422 interface controlled by the digital signal processor which provides for data transfer to and from a host computer or the like into the IC memory card.
A multipurpose bus interface circuit for interfacing a first communications bus to a second communications bus, said second communications bus being a Manchester encoded time division multiplexed serial data bus having first, second, third and fourth primary avionics buses and an electronic warfare bus, said multipurpose bus interface circuit comprising:
A multipurpose bus interface circuit for interfacing a first communications bus to a second communications bus, said second communications bus being a Manchester encoded time division multiplexed serial data bus having first, second, third and fourth primary avionics buses;
A multipurpose bus interface circuit for interfacing a first communications bus to a second communications bus, said second communications bus being a Manchester encoded time division multiplexed serial data bus having first, second, third and fourth primary avionics buses;
Dependencies are inferred from the claim text.