Apparatus for converting parallel bits of an electrical data signal into serial bits of an optical data signal utilizing an optical time delay

A parallel-serial signal converting apparatus, comprising:

• a plurality of switch means each having a control terminal which is used to control ON and OFF states of said switch means in response to an electric data signal representing a parallel data bit, wherein said switch means when in said ON state permits a signal to pass through and when in said OFF state does not permit a signal to pass through;
• means for distributing a single pulsed optical synchronizing signal to said plurality of switch means;
• at least one optical delay means connected to output terminals of said plurality of switch means, each thereof causing said optical synchronizing signal to be delayed by a predetermined time longer than a pulse width of said optical synchronizing signal by utilizing an optical delaying property;
• and
• optical coupling means connected to an output terminal of said at least one optical delay means, for coupling said optical synchronizing signals passing substantially simultaneously through said respective switch means in said ON state to produce a serial optical pulse signal.

A parallel-serial signal converting apparatus, comprising:

• a plurality of switch means each having a control terminal which is used to control ON and OFF states of said switch means in response to an electric data signal representing a parallel data bit, wherein said switch means when in said ON state permits a signal to pass through and when in said OFF state does not permit a signal to pass through;
• means for distributing a single pulsed optical synchronizing signal to said plurality of switch means;
• at least one optical delay means connected to input terminals of said plurality of switch means, each thereof causing said optical synchronizing signal to be delayed by a predetermined time longer than a pulse width of said optical synchronizing signal by utilizing an optical delaying property;
• and
• optical coupling means connected to output terminals of said plurality of switch means, for coupling said optical synchronizing signals passing with time difference through said respective switch means in said ON state to produce a serial optical pulse signal.

A parallel-serial signal converting apparatus, comprising:

• a plurality of switch means each having a control terminal which is used to control ON and OFF states of said switch means in response to an electric data signal representing a parallel data bit, wherein said switch means when in said ON state permits a signal to pass through and when in said OFF state does not permit a signal to pass through;
• means for distributing a single pulsed optical synchronizing signal to said plurality of switch means;
• at least one pair of optical delay means connected to input and output terminals of said plurality of switch means, each thereof causing said optical synchronizing signal to be delayed by a predetermined time longer than a pulse width of said optical synchronizing signal by utilizing an optical delaying property;
• and
• optical coupling means connected to said at least one pair of optical delay means on an output side of said plurality of switch means, for coupling said optical synchronizing signals passing with time difference through said respective switch means in said ON state to produce a serial optical pulse signal.

A computer system, comprising:

• a storage having a plurality of memory banks;
• a processing unit;
• a parallel-serial converting unit provided in each of said memory banks;
• means responsive to an access control signal outputted from said processing unit, for selecting a serial optical output signal from one of said plurality of memory banks;
• and
• means for converting the selected serial optical output signal into parallel electric signals to supply them to said processing unit;
• wherein each of said parallel-serial signal converting units includes:
• memory means responsive to the access control signal, for outputting a plurality of electric data signals representing parallel data bits;
• a plurality of switch means connected to said memory means, each switch means having a control terminal which is used to control ON and OFF states of said switch means in response to an electric data signal representing a parallel data bit, wherein said switch means when in said ON state permits a signal to pass through and when in said OFF state does not permit a signal to pass through;
• a plurality of electro-optical converting means connected to output terminals of said plurality of switch means, respectively;
• means for distributing a single pulsed electrical synchronizing signal to said plurality of switch means on the basis of system clocks of said processing unit;
• at least one optical delay means connected to output terminals of said electro-optical converting means, each thereof causing an incoming optical signal corresponding to said electrical synchronizing signal to be delayed by a predetermined time longer than a pulse width of said electrical synchronizing signal by utilizing an optical delaying property;
• and
• optical coupling means connected to an output terminal of said at least one optical delay means, for coupling said optical signals corresponding to said electrical synchronizing signal passing substantially simultaneously through said respective switching means in said ON state to produce the serial optical pulse signal.

A computer system, comprising:

• a storage having a plurality of memory banks;
• a processing unit;
• a parallel-serial converting unit provided in each of said memory banks;
• means responsive to an access control signal outputted from said processing unit, for selecting a serial optical output signal from one of said plurality of memory banks;
• and
• means for converting the selected serial optical output signal into parallel electric signals to supply them to said processing unit;
• wherein each of said parallel-serial signal converting units includes:
• memory means responsive to the access control signal, for outputting a plurality of electric data signals representing parallel data bits;
• a plurality of switch means connected to said memory means, each switch means having a control terminal which is used to control ON and OFF states of said switch means in response to an electric data signal, wherein said switch means when in said ON state permits a signal to pass through and when in said OFF state does not permit a signal to pass through;
• means for distributing a single pulsed optical synchronizing signal to said plurality of switch means on the basis of system clocks of said processing unit;
• at least one optical delay means connected to output terminals of said plurality of switch means, each thereof causing said optical synchronizing signal to be delayed by a predetermined time longer than a pulse width of said optical synchronizing signal by utilizing an optical delaying property;
• and
• optical coupling means connected to an output terminal of said at least one optical delay means, for coupling said optical synchronizing signals passing substantially simultaneously through said respective switch means in an ON state to produce the serial optical pulse signal.

A computer system, comprising:

• a storage having a plurality of memory banks;
• a processing unit;
• a parallel-serial converting unit provided in each of said memory banks;
• means responsive to an access control signal outputted from said processing unit, for selecting a serial optical output signal from one of said plurality of memory banks;
• and
• means for converting the selected serial optical output signal into parallel electric signals to supply them to said processing unit;
• wherein each of said parallel-serial signal converting units includes:
• memory means responsive to the access control signal, for outputting a plurality of electric data signals representing parallel data bits;
• a plurality of switching means each having a control terminal which is used to control ON and OFF states of said switch means in response to an electric data signal, wherein said switch means when in said ON state permits a signal to pass through and when in said OFF state does not permit a signal to pass through;
• means for distributing a single pulsed optical synchronizing signal to said plurality of switch means on the basis of system clocks of said processing unit;
• at least one optical delay means connected to input terminals of said plurality of switch means, each thereof causing said optical synchronizing signal to be delayed by a predetermined time longer than a pulse width of said optical synchronizing signal by utilizing an optical delaying property;
• and
• optical coupling means connected to output terminals of said plurality of switch means, for coupling said optical synchronizing signals passing with time difference through said respective switch means in said ON state to produce the serial optical pulse signal.

A computer system, comprising:

• a storage having a plurality of memory banks;
• a processing unit;
• a parallel-serial converting unit provided in each of said memory banks;
• means responsive to an access control signal outputted from said processing unit, for selecting a serial optical output signal from one of said plurality of memory banks;
• and
• converting means for converting the selected serial optical output signal into parallel electric signals to supply them to said processing unit;
• wherein each of said parallel-serial signal converting units includes:
• memory means responsive to the access control signal, for outputting a plurality of electric data signals representing parallel data bits;
• a plurality of switching means each having a control terminal which is used to control ON and OFF states of said switch means in response to an electric data signal, wherein said switch means when in said ON state permits a signal to pass through and when in said OFF state does not permit a signal to pass through;
• means for distributing a single pulsed optical synchronizing signal to said plurality of switch means on the basis of system clocks of said processing unit;
• at least one pair of optical delay means connected to input and output terminals of said plurality of switch means, each thereof causing said optical plurality of switch means, each thereof causing said optical synchronizing signal to be delayed by a predetermined time longer than a pulse width of said optical synchronizing signal by utilizing an optical delaying property;
• and
• optical coupling means connected to said at least one pair of optical delay means on an output side of said switch means, for coupling said optical synchronizing signals passing with time difference through said respective switch means in said ON state to produce the serial optical pulse signal.