US 5,349,613 A · Digital phase locked loop, and digital oscillator arranged to be used in the digital phase locked loop

Abstract

A digital Phase Locked Loop (PLL) comprises a Voltage Controlled Oscillator (VCO) and a phase detector. The output of the VCO is coupled to a first input of the phase detector whose output is coupled to the input of the VCO by way of a low-pass filter. A second input of the phase detector is coupled to the output of a digital oscillator. The time constant of the low-pass filter determines the time necessary for the PLL to respond to frequency changes of the signal of the digital oscillator, and is therefore preferably made smallest possible. The lower boundary of the time constant is determined by the smallest possible frequency change of the digital oscillator signal. If the smallest possible frequency change is very small, the PLL will generally become too slow because the time constant is too large. By presenting a reference signal to the digital oscillator which reference signal is shifted by a predetermined phase magnitude by the digital oscillator in each time interval, a low-pass filter having a much smaller time constant may be sufficient.

Claims20

Dependent claims

A digital phase locked loop, comprising a voltage controlled oscillator, a digital oscillator, a low-pass filter and a phase detector having first and second inputs and an output;

the phase detector output being coupled to an input of the voltage controlled oscillator through said low-pass filter, an output of the voltage controlled oscillator being coupled to the first input of the phase detector, and an output of the digital oscillator being coupled to the second input of the phase detector,
characterized in that the digital oscillator comprises means for receiving a reference signal, and
multiplexing shifter means for receiving and shifting said reference signal by a predetermined phase magnitude per time interval, and for generating an output signal which is the reference signal shifted by a predetermined phase magnitude per time interval,
said multiplexing shifter means comprising a shifter circuit providing a plurality of shifter output signals having the frequency of said reference signal and having a phase respectively differing from each other by said predetermined phase magnitude;
and a multiplexer having a plurality of multiplexer inputs respectively connected to said shifter outputs, for selecting a respective one of said multiplexer inputs to be said output signal for a time related to said time interval.

2 more elements

A digital phase locked loop, comprising a voltage controlled oscillator, a digital oscillator, a low-pass filter and a phase detector having first and second inputs and an output;

the phase detector output being coupled to an input of the voltage controlled oscillator through said low-pass filter, an output of the voltage controlled oscillator being coupled to the first input of the phase detector, and an output of the digital oscillator being coupled to the second input of the phase detector,
characterized in that the digital oscillator comprises means for receiving a reference signal, and
multiplexing shifter means for receiving and shifting said reference signal by a predetermined phase magnitude per time interval, and for generating an output signal which is the reference signal shifted by a predetermined phase magnitude per time interval,
said multiplexing shifter means comprises means for additionally phase-shifting said reference signal at least one phase pulse, having a predetermined amplitude substantially equal to said predetermined phase magnitude, during a said time interval;
and for the case where at least two phase pulses occur in a time interval, the pulse duration increases for each next phase pulse in that time interval, and
the digital oscillator further includes control means for generating a control signal whose duration corresponds to the time interval, and conveying means for conveying the control signal to said multiplexing shifter means, said control means having an output coupled to a control input of the conveying means, a first phase shift occurring in response to a first control signal and a next phase shift occurring in response to a next control signal.

3 more elements

A digital oscillator, for use in a digital phase locked loop, comprising means for receiving a reference signal, and

multiplexing shifter means for receiving and shifting said reference signal by a predetermined phase magnitude per time interval, and for generating an output signal which is the reference signal shifted by a predetermined phase magnitude per time interval,
characterized in that the digital oscillator further includes control means for generating a control signal whose duration corresponds to the time interval, and conveying means for conveying the control signal to said multiplexing shifter means, said control means having an output coupled to a control input of the conveying means, a first phase shift occurring in response to a first control signal and a next phase shift occurring in response to a next control signal.

Dependencies are inferred from the claim text.

Digital phase locked loop, and digital oscillator arranged to be used in the digital phase locked loop

Life of this patent

Digital phase locked loop, and digital oscillator arranged to be used in the digital phase locked loop

Life of this patent

Abstract

Claims20