Viterbi ACS unit with renormalization
AssigneeStanford Telecommunications, Inc.
InventorsHatch Graham, Christine Nguyen
Life of this patent
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Abstract
In a Viterbi decoder including an add-compare-select (ACS) processor, speed is enhanced without loss of performance by maintaining a dynamic cumulative metric range for computed state metrics. Current state metrics are added to new branch metrics to obtain two computed metrics, and the smaller of the two computed metrics is stored along with previously computed state metrics. The stored state metrics are compared with a selected scale factor, for example one-half maximum scale factor, and all current state metrics are rescaled when the minimum stored metric value exceeds the selected scale factor.
Claims3
An add-compare-select (ACS) processor for use in Viterbi decoding of convolutional codes comprising a plurality of ACS elements, each element including
- first and second adders to add values of current state metrics to new branch metrics for an upper and a lower branch, a comparator coupled to said adders for selecting the smaller of two metrics, and a storage element for storing the selected metric;
- and
- renormalization means for comparing stored metrics with a selected scale factor in one clock cycle, and rescaling all stored metrics when the minimum stored metric value exceeds said selected scale factor in the following clock cycle.
In a Viterbi decoder using an add-compare-select processor for determining minimum path metrics, a method of maintaining dynamic cumulative metric range including the steps of
- adding current state metrics to new branch metrics for upper and lower branches to obtain two computed metrics,
- selecting the smaller of said two computed metrics,
- storing said smaller of said two metrics along with other current state metrics,
- comparing said current state metrics with a selected scale factor during one clock cycle, and
- rescaling said current state metrics when the minimum stored metric value exceeds said selected scale factor in the following clock cycle.
Dependencies are inferred from the claim text.