Time slot switching function diagnostic system

A time slot switching function diagnostic system comprising:

• test pattern generating means for generating a test pattern;
• test pattern inserting means for inputting the test pattern from said test pattern generating means and an input signal having a unit frame consisting of N time slots and for inserting the test pattern into a specific time slot of the input signal in response to a pattern switching control signal;
• a data memory for storing an output from said test pattern inserting means and outputting data in accordance with write and read addresses;
• test pattern check means for checking a pattern extracted from the output data of said data memory in response to a clock signal;
• test address generating means, controlled by a control signal from said test pattern check means, for generating a test address;
• and
• address substituting means for substituting the write and read addresses of said data memory address generating means in order to switch the test pattern to another time slot;
• a first counter circuit for generating a sequential write address in an order of the N time slots, an address control memory for generating a read address of a predetermined pattern in an order of the N time slots, a latch circuit for adjusting a timing difference between the write address from said first counter circuit and the test address from a second counter circuit serving as said test address generating circuit by one time slot, a substitution write address generating circuit for generating a substitution write address of said data memory by using the write address from said first counter circuit and the test address from said second counter circuit, and a substitution read address generating circuit for generating a substitution read address of said data memory by using the read address from said address control memory and the test address adjusted by said latch circuit.