Mask ROM
AssigneeKabushiki Kaisha Toshiba
InventorTaira Iwase
Life of this patent
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Abstract
A mask ROM having a plurality of memory cell blocks, each composed of a main bit line, a ground line, and a plurality of memory cells for storing information. The mask ROM also includes a sense amplifier for reading the information stored in the memory cells via the main bit line. The mask ROM has a plurality of first block selecting means for selecting a memory cell block connected to the main bit line from a plurality of the memory cell blocks and a plurality of second block selecting means for selecting a memory cell block connected to the ground line from a plurality of the memory cell blocks. The first and second block selecting means are arranged alternately, with the memory cell block sandwiched therebetween.
Claims5
A mask ROM having a plurality of memory cell blocks each composed of a main bit line, a ground line, and a plurality of memory cells for storing information;
- and a sense amplifier for reading the information stored in the memory cells via the main bit line, which comprises:
- a plurality of first block selecting means for selecting a memory cell block to be connected to the main bit line from a plurality of the memory cell blocks;
- and
- a plurality of second block selecting means for selecting a memory cell block to be connected to the ground line from a plurality of the memory cell blocks, said first and second block selecting means being arranged alternately with the memory cell block sandwiched therebetween.
Dependencies are inferred from the claim text.