Multiport memory and method of operation thereof
AssigneeSony Corporation
InventorSeiichiro Iwase
Life of this patent
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AssigneeSony Corporation
InventorSeiichiro Iwase
Estimating the term…
A multiport memory having a plurality of serial output ports includes a semiconductor memory for storing data in a plurality of memory elements arrayed in rows and columns and coupled by respective row and column connecting lines. A first register stores data read in parallel from the semiconductor memory via the connecting lines of one of the rows and columns of the arrayed memory elements and serves to supply the data stored therein in serial form to a first one of the serial output ports. The first register is also operative to supply the data stored therein in parallel to a second register for storage therein. The second register is operative to supply the data stored therein to a second one of the serial output ports.
A method of operating a multiport memory having a plurality of serial output ports and a semiconductor memory operative to store data in a plurality of memory elements arrayed in rows and columns and coupled by respective row and column connecting lines, comprising the steps of:
A method of operating a multiport memory having a plurality of serial output ports and a semiconductor memory operative to store data in a plurality of memory elements arrayed in rows and columns and coupled by respective row and column connecting lines, comprising the steps of:
A method of operating a multiport memory having a plurality of serial output ports and a semiconductor memory operative to store data in a plurality of memory elements arrayed in rows and columns and coupled by respective row and column connecting lines, comprising the steps of:
A multiport memory having a plurality of serial output ports, comprising:
A multiport memory having a plurality of serial output ports, comprising:
The multiport memory having a plurality of serial output ports, comprising:
Dependencies are inferred from the claim text.