Method and apparatus for mixed analog and digital processing of delta modulated pulse streams including digital-to-analog conversion of a digital input signal
OwnerDjuro G. Zrilicinventor
Life of this patent
Estimating the term…
Loading patent…
OwnerDjuro G. Zrilicinventor
Estimating the term…
A digital processing circuit and method includes a signal modulator connected to modulate a delta-modulated first input signal with a digital second input signal to produce a delta modulated output pulse stream. The digital output can be directly used for many purposes, or the digital output can be demodulated to produce an analog output signal using a low pass filter. Also, if desired, the delta modulated pulse first pulse stream can be generated from an analog signal input through use of a sigma-delta modulator. The signal modulator includes a plurality of switches, each operated by a respective bit of the digital second input signal to switch between the delta modulated first input signal and a known pulse sequence, such as an idle sequence, for delivery to a switch output. A plurality of adder circuits are connected in series to add the successive outputs of the plurality of switches to the delta modulated pulse first input signal to produce the delta modulated output pulse stream. Each of the adder circuits comprises a full binary adder and a D-type flip-flop, the full binary adder having two binary signal inputs and a carry input, and having a sum output and a carry output, the sum output being connected to the carry input through the D-type flip-flop. The known pulse sequence, such as the idle sequence is connected to the input of the first adder circuit. The circuit can be used for many purposes, for example, to provide a multiplying digital-to-analog signal converter, a precision attenuator, or the like, without a requirement for precision components, circuit matching or other special analog signal matching techniques.
A digital processing circuit comprising:
A digital to analog converter for converting a digital signal having a plurality of bits, comprising:
An attenuator circuit for attenuating an input signal in accordance with the state of the bits of a digital control signal, comprising:
A method for digitally multiplying an input signal by a digital signal to produce a multiplied output signal, comprising:
A digital processing circuit comprising:
A digital processing circuit for converting a digital input signal having a plurality of weighted bits into a pulse density serial signal, comprising:
Dependencies are inferred from the claim text.