Dynamic storage allocation in a logic analyzer

Abstract

An apparatus and method for dynamic memory allocation conserves memory resources while providing efficient and effective interaction between concurrent synchronous and asynchronous acquisition of data for logic analysis. The apparatus includes circuitry for acquiring synchronous data, circuitry for acquiring asynchronous data, circuitry for generating timestamp values, circuitry for determining when the synchronous data is valid, circuitry for determining when the asynchronous data is valid, and circuitry for packing valid synchronous data and valid asynchronous data into a memory according to the sequence in which it was acquired with sufficient timestamp values included to permit reconstruction of the relative timing between all of the acquired data, with each data and timestamp value being identified with status bits to indicate whether it was synchronous data, asynchronous data, or a timestamp value. The method of dynamic memory allocation includes the steps of acquiring synchronous data, acquiring asynchronous data, generating timestamp values, determining when the synchronous data is valid, also determining when the asynchronous data is valid, and packing valid synchronous data and valid asynchronous data into a memory according to the sequence in which it was acquired with sufficient timestamp values included to permit reconstruction of the relative timing between all of the acquired data, with each data and timestamp value being identified with status bits to indicate whether it was synchronous data, asynchronous data, or a timestamp value.

Dependencies are inferred from the claim text.