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US 5,347,181 AGranted
Interface control logic for embedding a microprocessor in a gate array
AssigneeMotorola, Inc.
InventorsLaurin R. Ashby, Franz Steininger
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AssigneeMotorola, Inc.
InventorsLaurin R. Ashby, Franz Steininger
Estimating the term…
An interface circuit (14) that allows for a flexible three-way interface between a microprocessor (12), an ASIC cell block (16), and the external world has been provided wherein the microprocessor and the ASIC cell block are fabricated within a gate array (10). The interface circuit provides circuitry for each I/O pin (22, 23, 24) of the microprocessor to allow it to readily interface with the customer designed ASIC cell block or external devices via the ASIC I/O pads (20). The interface circuit also allows isolated testing of only the microprocessor, of only the ASIC cell block, or of both the microprocessor and the ASIC cell block. The interface circuit and the microprocessor are fully diffused and fixed-placed within the gate array while the ASIC cell block may be utilized by a customer to design a circuit to perform a customer defined function.
A logic circuit for providing a flexible interface between a microprocessor, an ASIC cell block and the external world, the microprocessor circuit and the ASIC cell block being located within a gate array where the microprocessor circuit is fully diffused and fixed-placed within the gate array, the logic circuit comprising a plurality of circuits for providing an interface between a plurality of microprocessor I/O pads to the ASIC cell block and to the external world, said logic circuit being fixed-placed within the gate array, said ASIC cell block being utilized to provide customer defined predetermined functions.
A gate array having a plurality of I/O pads, comprising:
Dependencies are inferred from the claim text.