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US 5,347,173 AGranted
Dynamic memory, a power up detection circuit, and a level detection circuit
AssigneeTexas Instruments Incorporated
InventorHugh P. McAdams
Life of this patent
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AssigneeTexas Instruments Incorporated
InventorHugh P. McAdams
Estimating the term…
A voltage level detection circuit is disclosed. The circuit is incorporated into a dynamic memory, integrated onto a single semiconductor substrate to which external voltage and reference potentials are applied. The dynamic memory contains an array of memory cells and circuitry for writing and reading information into and from the cells of the array. It contains an oscillator for generating an oscillator signal when the external voltge is above the reference potential. The voltage level detection circuitry is controlled by the oscillator signal, for controlling a voltage obtained from the external voltage, to the reading and writing circuitry and to the array to prevent the voltage from being applied unless the voltage at least of a predetermined minimum value. It may contain a circuit for sampling the obtained voltage during selected oscillator cycles to determine whether the obtained voltage is above the predetermined value. Other elements may be added to further enhance performance of the circuit.
A power up detection circuit for detecting when a power source voltage reaches a certain level relative to a reference voltage, comprising:
A level detection circuit to produce an output signal when a power supply attains a certain voltage level, comprising:
Dependencies are inferred from the claim text.