US 5,347,161 A · Stacked-layer structure polysilicon emitter contacted p-n junction diode

Abstract

A process is used to fabricate diodes having an emitter contacted p-n junction. A stack of n.sup.+ -type polysilicon layers are formed one upon the other upon a p-type silicon substrate. In an accordingly fabricated diode, native oxide layers that forms between the n.sup.+ -type polysilicon layer and the p-type substrate would be liable to be broken up, and thicker epitaxial layer would be formed between the same. The p-n junction is with a thickness of 0.05-0.2 .mu.m. As the diode is reverse-biased, for example at -5V, leakage current could be less than 1 n.ANG./cm.sup.2. The reverse-bias breakdown voltage could be larger than -100 V. When forward-biased, the ideality factor of the diode is close to unity.

Claims4

Dependent claims

A p-n junction diode, comprising:

(a) a substrate of p-type semiconductor;
(b) a stack of at least two layers of N.sup.+ -type polysilicon formed upon said substrate;
and
(c) an electrode disposed over said stack of at least two n.sup.+ -type polysilicon layers;
wherein each of said n.sup.+ -type polysilicon layers has a thickness in the range from 500 .ANG. to 1000 .ANG. and a donor concentration of at least 10.sup.20 cm.sup.-3.

2 more elements

Dependencies are inferred from the claim text.

Stacked-layer structure polysilicon emitter contacted p-n junction diode

Life of this patent

Stacked-layer structure polysilicon emitter contacted p-n junction diode

Life of this patent

Abstract

Claims4