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US 5,347,146 AGranted
Polysilicon thin film transistor of a liquid crystal display
AssigneeGoldstar Co., Ltd.
InventorHoe S. Soh
Life of this patent
Estimating the term…
Abstract
A thin film transistor comprising a multi-layer structure including an amorphous silicon layer and a metal layer both forming source and drain regions. The source and drain regions have opposite exposed edges with a slant shape. An active semiconductor layer is disposed at a channel region defined between the source region and the drain region so that it is overlapped with the upper surface portions of the source and drain regions adjacent to their edges faced to each other. In a CMOS type thin film transistor, its n type TFT has a gate overlapped with the source and drain regions and its p type TFT has a gate offsetted from the source and drain region.
Claims10
A thin film transistor comprising:
- a substrate;
- a first semiconductor layer formed over one side portion portion of an upper surface of the substrate and provided with at at least one exposed edge, the first semiconductor layer also having a contact at its upper surface;
- a second semiconductor layer formed over the other side portion of the upper surface of the substrate and provided with at least one exposed edge, the second semiconductor layer also having a contact at its upper surface;
- a third semicondcutor layer formed over the upper surface of the substrate between both side portions thereof and provided with at least one exposed edge;
- a first active semiconductor layer formed over the upper surface of the substrate such that it is disposed adjacent to the facing edges of the first and third semiconductor layers;
- a second active semiconductor layer formed over the upper surface of the substrate such that it is overlapped with upper surface portions of the second and third semiconductor layers, the upper surface portions being adjacent to the facing edges of the second and third semicondcutor layers;
- a gate insulating film formed over the resultant entire exposed surface of the substrate and all layers formed thereon, except for the contacts of the first and second semiconductor layers;
- a first electrode formed over the gate insulating film and connected with the first semiconductor layer through the contact of the first semiconductor layer;
- a second electrode formed over the gate insulating film and connected with the second semiconductor layer through the contact of the second semiconductor layer;
- a first gate electrode formed over the gate insulating film such that it is overlapped at its opposite edges with both the first and third semiconductor layers by a predetermined width;
- and
- a second gate electrode formed over the gate insulating film and having a width smaller than the width between the second and third semiconductor layers, the second gate electrode being offset at its opposite edges with both the second and third semiconductor layers by a predetermined width.
9 more elements
A thin film transistor comprising:
- a substrate;
- a first semiconductor layer formed over one side portion of an upper surface of the substrate and provided with at least one exposed edge, the first semiconductor layer also having a contact at its upper surface;
- a second semiconductor layer formed over the other side portion of the upper surface of the substrate and provided with at least one exposed edge, the second semiconductor layer also having a contact at its upper surface;
- a third semiconductor layer formed over the upper surface of the substrate between both side portions thereof and provided with at least one exposed edge;
- a first active semiconductor layer formed over the upper surface of the substrate such that it is overlapped with upper surface portions of the first and third semiconductor layers, the upper surface portions being adjacent to the facing edges of the first and third semiconductor layers;
- a second active semiconductor layer formed over the upper surface of the substrate such that it is disposed adjacent to the facing edges of the second and third semiconductor layers;
- a gate insulating film formed over the resultant entire exposed surface of the substrate and all layers formed thereon, except for the contacts of the first and second semiconductor layers;
- a first electrode formed over the gate insulating film and connected with the first semiconductor layer through the contact of the first semiconductor layer;
- a second electrode formed over the gate insulating film and connected with the second semiconductor layer through the contact of the second semiconductor layer;
- a first gate electrode formed over the gate insulating film and having a width smaller than the width between the first and third semiconductor layers, the first gate electrode being offset at its opposite edges with both the first and third semiconductor layers by a predetermined width;
- and
- a second gate electrode formed over the gate insulating film such that it is overlapped at its opposite edges with both the second and third semiconductor layers by a predetermined width.
9 more elements
A thin film transistor comprising:
- a substrate;
- a first semiconductor layer formed over one side portion of an upper surface of the substrate and provided with at least one exposed edge, the first semiconductor layer also having a contact at its upper surface;
- a second semiconductor layer formed over the other side portion of the upper surface of the substrate and provided with at least one exposed edge, the second semiconductor layer also having a contact at its upper surface;
- a third semiconductor layer formed over the upper surface of the substrate between both side portions thereof and provided with at least one exposed edge;
- a first active semiconductor layer formed over the upper surface of the substrate such that it is in contact with the facing edges of the first and third semiconductor layers;
- a second active semiconductor layer formed over the upper surface of the substrate such that it is in contact with the facing edges of the second and third semiconductor layers;
- a gate insulating film formed over the resultant entire exposed surface of the substrate and all layers formed thereon, except for the contacts of the first and second semiconductor layers;
- a first electrode formed over the gate insulating film and connected with the first semiconductor layer through the contact of the first semiconductor layer;
- a second electrode formed over the gate insulating film and connected with the second semiconductor layer through the contact of the second semiconductor layer;
- a first gate electrode formed over the gate insulating film and having a width smaller than the width between the first and third semiconductor layers;
- and
- a second gate electrode formed over the gate insulating film such that it is disposed above the second active semiconductor layer.
9 more elements
Dependencies are inferred from the claim text.