Microprogram control circuit

A microprogram control circuit for a microprocessor which implements the function of an instruction in accordance with microinstructions, where said control circuit comprises:

• an instruction decoder for receiving an instruction and generating an entry micro address code when said instruction is decoded, said entry micro address determined by an op code in said instruction;
• microinstruction memory means for storing a plurality of microinstructions at storage locations accessed by micro address codes,
• information bit storage means for storing a unique valid or invalid information bit at storage locations accessed by each micro address code, each unique information bit for indicating whether a microinstruction stored at a storage location accessed by a micro address code is valid or invalid,
• expansion microinstruction memory means for storing a plurality of expansion microinstructions at storage locations accessed by a portion of each micro address code,
• a micro pointer, coupled to selectively receive said entry micro address code from said decoder or micro address codes based on accessed microinstructions or expanded microinstructions, for providing said entry micro address code to said microinstruction memory and a portion of said entry micro address code to said expansion microinstruction memory when said instruction is decoded,
• selection means, coupled to said information bit storage means, said microinstruction memory means, and said expansion microinstruction memory means, for providing an entry microinstruction from a storage location in said microinstruction memory means accessed by said entry micro address code if a valid information bit is accessed by said entry micro address code and for providing an entry expanded microinstruction from a storage location in said expanded microinstruction memory means accessed by said portion of said entry micro address code if an invalid information bit is accessed by said entry micro address code, wherein
• the function of said microinstruction designated by said entry micro address code is changed to the function of said expansion microinstruction in accordance with said invalid information bit.