Method and apparatus for controlling dual bus system
AssigneeHitachi, Ltd.
InventorsMasayuki Tanji, Yoshihiro Miyazaki, Hiroaki Fukumaru, Syoji Yamaguchi, Koji Masui, Hisao Ogawa
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AssigneeHitachi, Ltd.
InventorsMasayuki Tanji, Yoshihiro Miyazaki, Hiroaki Fukumaru, Syoji Yamaguchi, Koji Masui, Hisao Ogawa
Estimating the term…
A method and apparatus for controlling a dual bus system, capable of realizing high speed and continuous operation even if one of the buses of the dual bus system fails. The method and apparatus has a dual bus system, a plurality of electronic circuits connected to both buses of the dual bus system, and bus controller for providing a bus use allowance signal to one of the plurality of electronic circuits, the one electronic circuit being selected in accordance with bus occupation request signals issued from the plurality of electronic circuits requesting data transfer. If the bus occupation request signals for both buses of the dual bus system originates from the one selected electronic circuit and the outputs of the arbiters coincide, the bus use allowance signal is provided to the one selected electronic circuit for the allowance of occupying both buses of the dual bus system. A completion of data transfer at the dual bus system is determined when data transfer is completed at both buses. Continuous operation can be ensured immediately upon occurrence of a failure, and high speed operation of a computer system is possible.
The dual bus control method having a dual bus system, a plurality of electronic circuits, each having a dual bus interface, connected to both buses of said dual bus system, and bus controllers, each of said bus controllers being connected to both of said buses and being interconnected by interactive paths, each of said bus controllers providing a bus use allowance signal through an arbiter thereof to one of said plurality of electronic circuits having issued a bus use request signal through a request line thereto, said dual bus control method comprising the steps of:
The dual bus control method according to claim 3, wherein an interrupt is issued between said electronic circuits when a data transfer at said dual bus system is completed.
The dual bus control apparatus having a dual bus system, a plurality of electronic circuits, each having a dual bus interface, connected to both buses of said dual bus system, and bus controllers, each of said bus controllers being connected to both of said buses and being interconnected by interactive paths, each of said bus controllers providing a bus use allowance signal through the buses to one of said plurality of electronic circuits having issued a bus use request signal through request line thereto, said dual bus control apparatus comprising:
A dual bus control apparatus, comprising:
Dependencies are inferred from the claim text.