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US 5,345,489 AGranted
Timer circuit having comparator comparing contents of counter and register
AssigneeNEC Corporation
InventorMinoru Saitoh
Life of this patent
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AssigneeNEC Corporation
InventorMinoru Saitoh
Estimating the term…
A timer circuit is disclosed which includes a counter counting a clock signal, a register temporarily storing data, and a comparator comparing a count value of the counter with the data stored in the register and producing a signal when the count value of the counter reaches the value represented by the data stored in the register. Further provided in the timer circuit are detection circuit detecting the value of the data stored in the register and producing a detection signal when the register is written with data indicative of a value that is equal to an initial value of the counter and a circuit responding to the detection circuit to cause the register to change the value of the data stored therein to another value that is different from the initial value of the counter.
A timer circuit comprising a counter counting a clock signal, a register temporarily storing data, a comparator comparing a count value of said counter with data stored in said register and producing a coincident signal when the count value of said counter is coincident with the data stored in the register, detection means for detecting data stored in sid register and producing a detection signal when said register is written with data indicative of value that is equal to a initial value of said counter, and changing means responsive to said detection signal for changing a value of the data stored in said register to another value that is different from said initial value of said counter.
A timer circuit comprising a counter counting a clock signal, a register temporarily storing data, interrupt request means for supplying an interrupt request signal to a data processing unit when a count value of said counter reaches a value represented by the data stored in said register, detection means for producing a detection signal when said register is written with data indicative of a value that is equal to an initial value of said counter, and means responsive to said detection signal for issuing a system reset request to said data processing unit, said data processing unit responding to said system reset request to generate a command signal to said register to cause said register to change data stored therein to another data having a value different form said initial value of said counter.
Dependencies are inferred from the claim text.