Cyclic redundancy check operating method and a head error checker synchronizing unit in an asynchronous transfer mode switching process

A head error checker (HEC) synchronizing unit used in an asynchronous transfer mode (ATM) switching process for detecting errors in a header part of a cell having a CRC code and performing a cell synchronizing operation in the asynchronous transfer mode switching process, said HEC synchronizing unit comprising:

• CRC operating means for performing a cyclic redundancy check operation in which received data of said cell inputted in a byte unit is divided by a predetermined generated polynomial, for outputting a corresponding CRC operation result actual value as a remainder, and for inputting into said operating means as an initial value said outputted CRC operation result actual value outputted in a previous said cyclic redundancy check operation,
• delay means for delaying said outputted operation result actual value by an amount of time taken for a header part of said received data to be inputted,
• CRC operation result deriving means for receiving as an initial value said delayed CRC operation result actual value outputted by said delay means and for generating a value as a CRC operation result derivation value as if it were obtained as a result of a CRC operation performed for all the received data of the header part based on said received initial value, and
• coincidence detecting means for comparing a CRC operation result actual value outputted by said CRC operating means with a CRC operation result derivation value generated by said CRC operation result deriving means, and for detecting an input timing of said received data, having no errors and having a header part provided with a CRC code of said data length, as coincident timing of both values.