Clock generation

A method of synchronizing a multiplexor and a processing device on an integrated circuit, the method comprising the steps of:

• controlling a stream of data supplied to the multiplexor with a first clock signal at a first rate;
• supplying the first clock signal to clock generation circuitry on the integrated circuit, said clock generation circuitry being operable to produce from said first clock signal a high rate clock signal which is an integral multiple of said first rate and synchronized thereto;
• and
• controlling the multiplexor using the high rate clock signal.

An integrated circuit comprising:

• a terminal connected to receive a first clock signal at a first rate;
• clock generation circuitry connected to receive said first clock signal at said first rate and operable to produce therefrom a high rate clock signal which is an integral multiple of said first rate and synchronized with said first rate;
• a multiplexor having a plurality of inputs connected to receive respective incoming data streams in parallel under the control of said first clock signal at said first rate, the multiplexor being connected to receive said high rate clock signal and to output said data serially at the rate of said high rate clock signal;
• and
• a processing device coupled to receive said data output from the multiplexor at the rate of said high rate clock signal and having a terminal for receiving said high rate clock signal to control processing of that data.