US 5,345,422 A · Power up detection circuit

Abstract

A circuit for producing a power up detection signal for use in, and being integrated onto the same semiconductor substrate as a dynamic memory device is disclosed. The circuit has a first node and a circuit to promote a low voltage on the first node when a voltage obtained from a supply voltage applied to the dynamic memory is below a predetermined level. It has a second node from which the power up detection signal can be removed. Included is a circuit to promote the obtained voltage on said second node when the obtained voltage is below the predetermined level, whereby the power up detection signal can be used to isolate the obtained voltage from the dynamic memory device. Included is a circuit to maintain a high voltage on the first node when the obtained voltage exceeds the predetermined level. Also included is a circuit to maintain the voltage on the second node at a low state when the high voltage appears on the first node, whereby the power up detection signal can be used to apply to obtained voltage to said dynamic memory device.

Claims9

Dependent claims

A power up detection circuit for a device formed on a semiconductor substrate, comprising:

a CMOS inverter formed of a P-channel transistor, an N-channel transistor, an input and an output, the P-channel transistor biased by a voltage that is coupled to the input;
and
a first and a second N-channel transistor, the first N-channel transistor connected between the N-channel transistor of the CMOS inverter and ground, the second N-channel transistor connected between the first N-channel transistor and a source of the voltage, and the gate of the second N-channel transistor connected to the output of the CMOS inverter for initially applying to the N-channel transistor of the CMOS inverter during power up a potential for keeping the N-channel transistor turned off, thereby preventing the output of the CMOS inverter from being discharge through the N-channel transistor.

Dependencies are inferred from the claim text.

Power up detection circuit

Life of this patent

Power up detection circuit

Life of this patent

Abstract

Claims9