Positive feedback low input capacitance differential amplifier
AssigneeVTC Inc.
InventorsCraig M. Brannon, Tuan V. Ngo
Life of this patent
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Abstract
A read preamplifier for use in reading data in a magnetic storage system uses positive feedback to reduce the preamplifier's input capacitance. The read preamplifier includes first and second voltage supply terminals. An input is coupled to the second voltage supply terminal and receives input signals from a connected magnetic head. An output is coupled to the first voltage supply terminal and to the input for producing output signals based upon the input signals. A positive feedback circuit, coupled to the input reduces the input capacitance of the read preamplifier.
Claims17
An improved read preamplifier of the type having a differential pair of transistors which act as first and second input transistors to the read preamplifier, having a first current source coupled to each of the first and second input transistors, having a first cascode stage transistor coupled to the first input transistor and a second cascode stage transistor coupled to the second input transistor, the first and second cascode stage transistors providing first and second outputs of the read preamplifier, the read preamplifier also having a first load coupled to the first cascode stage transistor and a second load coupled to the second cascode stage transistor, the improvement comprising:
- first positive feedback gain control means, coupled between the second load and the first cascode stage transistor, for controlling the gain of the first input transistor and thereby controlling the input capacitance of the first input transistor;
- and
- second positive feedback gain control means, coupled between the first load and the second cascode stage transistor, for controlling the gain of the second input transistor and thereby controlling the input capacitance of the second input transistor.
An improved read preamplifier of the type having a differential pair of transistors which act as first and second input transistors to the read preamplifier, having a first current source coupled to each of the first and second input transistors, having a first cascode stage transistor coupled to the first input transistor and a second cascode stage transistor coupled to the second input transistor, the first and second cascode stage transistors providing first and second outputs of the read preamplifier, the read preamplifier also having a first load coupled to the first cascode stage transistor and a second load coupled to the second cascode stage transistor, the improvement comprising:
- means for establishing a positive gain for the first and second input transistors comprising:
- a first feedback transistor having a first electrode, a second electrode coupled to the first cascode stage transistor, and a control electrode coupled to the second load;
- a second feedback transistor having a first electrode, a second electrode coupled to the second cascode stage transistor, and a control electrode coupled to the first load;
- a second current source coupled to the second electrode of the first feedback transistor;
- and
- a third current source coupled to the second electrode of the second feedback transistor.
A read differential preamplifier for use in reading data in a magnetic storage system, the read differential preamplifier comprising:
- first and second voltage supply terminals;
- a first current source coupled to the second voltage supply terminal;
- a first input stage transistor having a first electrode, a second electrode coupled to the first current source, and a control electrode which acts as a first input to the differential preamplifier, wherein the first and second electrodes are connected in series and form a portion of a first current path;
- a second input stage transistor having a first electrode, a second electrode coupled to the first current source, and a control electrode which acts as a second input to the differential preamplifier, wherein the first and second electrodes are connected in series and form a portion of a second current path;
- a first output stage transistor having a first electrode coupled to the first voltage supply terminal through a first resistor, the first electrode acting as a first differential preamplifier output, a second electrode coupled to the first electrode of the first input stage transistor, and a control electrode for receiving a first positive feedback signal, the first positive feedback signal controlling the input capacitance of the first input stage transistor, wherein the first and second electrodes of the first output stage transistor are connected in series with the first and second electrodes of the first input stage transistor and with the first resistor to form a portion of the first current path;
- a second output stage transistor having a first electrode coupled to the first voltage supply terminal through a second resistor, the first electrode acting as a second differential preamplifier output, a second electrode coupled to the first electrode of the second input stage transistor, and a control electrode for receiving a second positive feedback signal, the second positive feedback signal controlling the input capacitance of the second input stage transistor, wherein the first and second electrodes of the second output stage transistor are connected in series with the first and second electrodes of the second input stage transistor and with the second resistor to form a portion of the second current path;
- first control means coupled to the control electrode of the first output stage transistor for providing the first positive feedback signal as a function of a first input signal at the first input to the differential preamplifier to control the input capacitance of the first input stage transistor so that the differential preamplifier maximum read data rate increases;
- and
- second control means coupled to the control electrode of the second output stage transistor for providing the second positive feedback signal as a function of a second input signal at the second input to the differential preamplifier to control the input capacitance of the second input stage transistor so that the differential preamplifier maximum read data rate increases.
Dependencies are inferred from the claim text.