Method and apparatus for qualifying data peaks

A system for eliminating invalid peaks from a received signal stream containing valid data peaks, said system comprising:

• means for receiving said signal stream with each of said peaks being represented as a binary number whose magnitude specifies the amplitude of the peak represented by said binary number;
• a post peak eliminator for eliminating invalid post peaks subsequent to a valid data peak in said stream and of a lesser amplitude than said valid data peak, said post peak eliminator comprising;
• means in said post peak eliminator for outputting to a pre-peak eliminator data pulses representing valid data peaks as well as invalid pre-peaks preceding a valid data peak and of the same polarity a valid data peak;
• means for outputting a clock pulse and a polarity signal concurrent with the outputting of each data pulse with said polarity signal specifying the polarity of the peak represented by each outputted data pulse;
• said system further including a pre-peak eliminator for eliminating as invalid pre-peaks preceding a subsequently received valid data peak;
• said pre-peak eliminator comprising;
• a shift register;
• means for receiving each data pulse and clock pulse and polarity signal outputted by said post peak eliminator;
• means controlled by said received clock pulses for entering into said shift register each received data pulse;
• means for advancing said data pulse within said shift register under control of said received clock pulses,
• control logic for operating said shift register in response to the reception of said clock pulses and said polarity signals to eliminate from said shift register a data pulse representing an invalid pre-peak if the next received data pulse is of the same polarity as the eliminated data pulse;
• and
• means for outputting as a valid data pulse the last data pulse received in a sequence of received data pulses representing received peaks of the same polarity as specified by said polarity signal.

A system for eliminating invalid signal peaks from a signal stream containing both invalid signal peaks and valid data signal peaks, said invalid signal peaks comprising invalid pre-peak signals preceding a valid data signal peak as well as invalid post peaks following a valid data signal peak, said system comprising:

• a post peak eliminator comprising;
• means for receiving said signal stream with each of said peaks being represented as a binary number whose magnitude specifies the amplitude of the peak represented by said binary number;
• digital processing circuitry responsive to the receipt of peaks in said signal stream for detecting invalid post-peaks and for outputting data pulses representing valid data peaks as well as invalid pre-peaks to a pre-peak eliminator;
• said pre-peak eliminator comprising;
• a shift register for receiving said pulses outputted from said post peak eliminator;
• and
• control logic for operating said shift register to eliminate an invalid pre-peak in response to the reception of the next received data pulse of the same polarity as the invalid pre-peak pulse.

A method of eliminating invalid peaks from a received signal stream containing valid data peaks, said method comprising the steps of:

• receiving said signal stream with each of said peaks being represented as a binary number whose magnitude specifies the amplitude of the peak represented by said binary number;
• operating a post peak eliminator for eliminating invalid post peaks received subsequent to a valid data peak in said signal stream with each of said invalid post peaks being of a lesser amplitude than said valid data peak and being of the same polarity as said valid data peak, method of operating said post peak eliminator comprising the steps of;
• storing a digital value representing the amplitude of a received peak in digital hold register means,
• comparing a digital value representing the amplitude of each subsequently received peak with the digital value of a previously received peak currently stored in said hold register means,
• outputting a data pulse representing a subsequently received peak if the digital value of said subsequently received peak is greater than the digital value of the peak currently stored in said hold register means and for updating said hold register means with the digital value of said subsequently received peak,
• maintaining the digital value for a peak currently in said hold register means while inhibiting the outputting of a data pulse in response the reception of a subsequent peak of a lessor digital value than the digital value of the peak currently in said hold register means;
• and
• outputting a clock pulse and a polarity signal concurrent with the outputting of each data pulse with said polarity signal specifying the polarity of the peak represented by each outputted data pulse;
• said system further including a pre-peak eliminator for receiving each data pulse and clock pulse and said polarity signals outputted by said post peak eliminator;
• said method further comprising the step of:
• operating said pre-peak eliminator in response to said reception of said outputted data pulses and said clock pulses and said polarity signals to eliminate the received data pulses representing invalid pre-peaks and for applying a data pulse representing each valid peak to a utilization means.

A method for eliminating invalid peaks from a received signal stream containing valid data peaks, said method comprising the steps of:

• receiving said signal stream with each of said peaks being represented as a binary number whose magnitude specifies the amplitude of the peak represented by said binary number;
• operating a post peak eliminator for eliminating invalid post peaks subsequent to a valid data peak in said stream and of a lesser amplitude than said valid data peak, said post peak eliminator comprising;
• operating means in said post peak eliminator for outputting to a pre-peak eliminator data pulses representing valid data peaks as well as invalid pre-peaks preceding a valid data peak and of the same polarity a valid data peak;
• outputting a clock pulse and a polarity signal concurrent with the outputting of each data pulse with said polarity signal specifying the polarity of the peak represented by each outputted data pulse;
• said system further including a pre-peak eliminator for eliminating as invalid pre-peaks preceding a subsequently received valid data peak;
• said pre-peak eliminator comprising;
• a shift register;
• said method further comprising the steps of:
• receiving each data pulse and clock pulse and polarity signal outputted by said post peak eliminator;
• by said received clock pulses for entering into said shift register each received data pulse under control of;
• advancing said data pulse within said shift register under control of said received clock pulses,
• operating said shift register in response to the reception of said clock pulses and said polarity signals to eliminate from said shift register a data pulse representing an invalid pre-peak if the next received data pulse of the same polarity as the eliminated data pulse;
• and
• outputting as a valid data pulse the last data pulse received in a sequence of received data pulses representing received peaks of the same polarity as specified by said polarity signal.

A method for eliminating invalid signal peaks from a signal stream containing both invalid signal peaks and valid data signal peaks, said invalid signal peaks comprising invalid pre-peak signals preceding a valid data signal peak as well as invalid post peaks following a valid data signal peak, said method comprising the steps of:

• operating a post peak eliminator for receiving said signal stream with each of said peaks being represented as a binary number whose magnitude specifies the amplitude of the peak represented by said binary number;
• operating digital processing circuitry in said post peak eliminator in response to the receipt of peaks in said signal stream for detecting invalid post-peaks and for outputting data pulses representing valid data peaks as well as invalid pre-peaks to a pre-peak eliminator;
• operating a pre-peak eliminator including a shift register for receiving said pulses outputted from said post peak eliminator;
• and
• operating said shift register to eliminate an invalid pre-peak in response to the reception of the next received data pulse of the same polarity as the invalid pre-peak pulse.