Cascade sense amplifier for reading out data stored in semiconductor memory device

Abstract

A cascade sense amplifier includes section separated sense amplifiers, a cascade wiring and a main sense amplifier. The main sense amplifier has a capacitance regulation element provided at a base potential of input transistors constituting a data input end. The element is comprised of a metal oxide semiconductor (MOS) transistor for forming a capacitance corresponding to a potential V.sub.SS mainly forming a capacitance by the cascade wiring. A size of the element is determined in the manner that the base potential drop time of the transistors is equal to a potential drop time of the cascade wiring when a power source voltage V.sub.CC drops. Even though the power source voltage V.sub.CC drops, the transistors have no cut-off condition so as to prevent the read-out time from delaying. Especially, if the element is comprised of a MOS transistor, it is possible to use an extremely thin gate insulation layer as a dielectric, thereby suppressing an increase of a chip size.

Dependencies are inferred from the claim text.