Method of forming interlevel dielectric for integrated circuits
AssigneeAT&T Bell Laboratories
InventorsChien-Shing Pai, Yih-Cheng Shih
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Abstract
A method of forming an interlevel dielectric suitable for use with semiconductor integrated circuits is disclosed. The dielectric illustratively includes a triple layer sandwich of ozone-TEOS formed between two layers of plasma-enhanced TEOS. The dielectric is capable of filling high-aspect ratio trenches between runners. The ozone-TEOS is formed at a high pressure (approximately 90 Torr) to reduce hydrogen absorption. The reduced-hydrogen content ozone-TEOS is less susceptible to moisture formation and, therefore, presents less risk of degrading subsequently formed aluminum runners.
Claims4
A method of semiconductor integrated circuit fabrication comprising:
- forming a first dielectric overlying a substrate, said dielectric being formed in a reactor having a total chamber pressure and utilizing a TEOS precursor gas containing hydrogen and utilizing ozone;
- said reactor having a pressure of approximately 90 Torr and an ozone concentration of 8-12 weight percent, a TEOS flow rate of approximately 1000 sccm and an oxygen flow rate of 1500-2500 sccm whereby the hydrogen content of said dielectric after formation is less than 10 atomic percent.
A method of semiconductor integrated circuit fabrication comprising:
- forming a first silicon dioxide dielectric overlying a substrate in a reactor chamber;
- forming a second silicon dioxide dielectric upon said first dielectric, said formation taking place in the same said reactor chamber and utilizing ozone and a precursor gas containing hydrogen;
- CHARACTERIZED IN THAT the total chamber pressure of said reactor during formation of said second dielectric is chosen at a sufficiently high value so that the hydrogen content of said second dielectric after formation is less than 10 atomic percent;
- etching back said second dielectric in said reactor to expose portions of said first dielectric;
- and then
- forming a third dielectric in said same reaction chamber, said third dielectric covering said second dielectric and the said exposed portions of said first dielectric.
Dependencies are inferred from the claim text.