Method and apparatus for non-destructive testing of inner lead tab bonds and semiconductor chips

Abstract

A method and an apparatus for determining the operability of a semiconductor chip including at least one bond between the semiconductor chip and at least one electrical lead, the at least one electrical lead having a first surface, the at least one bond connecting the first surface to the semiconductor chip. The apparatus has a handling carrier rigidly supporting the semiconductor chip, a test socket containing the handling carrier for providing an electrical path from the test socket to the at least one electrical lead and through the at least one bond to the semiconductor chip and back, and a computer for applying an electrical signal to the electrical path for generating an output signal. A gas nozzle is provided, positionable near the first surface, for directing a gas flow at the first surface while an electrical signal is applied. The gas flow generates a force on the electrical lead in a direction away from the semiconductor chip. The computer compares the output signal with a predetermined, characteristic signal to determine operability of the semiconductor chip.

Dependencies are inferred from the claim text.