Configuration features in a configurable logic array

A configurable logic array comprising:

• a plurality of individually configurable logic elements arranged in a matrix, each configurable logic element including a storage register for storing working data;
• configuration data storage protocol means for storing configuration data utilizable for configuring the configurable logic elements;
• and
• reset circuitry connected to the configuration data storage protocol means for modifying the configuration data without modifying the working data.

A configurable logic array comprising:

• a plurality of individually configurable logic elements arranged in a matrix;
• configuration data storage protocol means for storing configuration data utilizable for configuring the configurable logic elements;
• and
• read disable circuitry connected to the configuration data storage protocol means for disabling read access to the configuration data storage protocol means.

A configurable logic array comprising:

• a plurality of individually configurable logic cells arranged in a matrix;
• configuration data storage protocol means for storing configuration data utilizable for configuring the configurable logic cells;
• and
• write disable circuitry connected to the configuration data storage protocol means for disabling write access to the configuration data storage means.

A configurable logic array comprising:

• a plurality of individually configurable logic cells arranged in a matrix;
• reconfiguration logic connected to the matrix and responsive to a configuration clock signal for configuring the configurable logic cells;
• and
• clock selection means connected to the reconfiguration logic and that selects from first and second independent clock signals too provide the configuration clock signal.