US 5,334,885 A · Automatic control of buffer speed

Abstract

The number of active switching elements in a buffer is automatically varied to compensate for variations in the manufacturing process, operating temperature, and power supply voltage. For this purpose, a reference voltage which is proportional to the speed of a switching transistor is applied to an analog-to-digital (A/D) converter. The A/D converter may be implemented with a simple resistor divider and comparators, all of which can be made on-chip. The resistor dividers are chosen such that at worst-case slow conditions all the comparators have high outputs. As the process/temperature/voltage changes, the reference voltage also increases. This successively turns off sections of the switching transistor, thereby slowing down the response of the buffer. Since the control leads are digital, they are not susceptible to noise as they are routed around a chip full of noisy signals. The digital control signals may be latched, and the control circuitry powered down to zero for powersensitive applications.

Claims15

Dependent claims

An integrated circuit comprising a buffer output device of a given conductivity type for pulling a node toward a given voltage level, and means for controlling the switching speed of said device to compensate for variations in at least one of the factors of:

manufacturing process, operating temperature, and power supply voltage;
Characterized in that said means for controlling the speed comprises:
a reference device of said given conductivity type for generating an analog reference signal that tracks the effect of at least one of said factors on said switching speed, and an analog-to-digital converter comprising at least two comparators that receive said analog reference signal, compare said analog reference signal to fixed reference voltages, and produce digital control signals thereby;
and wherein said buffer output device comprises independently-controllable switching elements that are rendered active, or alternatively inactive, by said digital control signals.

1 more element

An integrated circuit comprising a buffer output field effect transistor of a given conductivity type for pulling a buffer output node toward a first power supply voltage conductor, and means for controlling the switching speed of said transistor to compensate for variations in at least one of the factors of:

manufacturing process, operating temperature, and power supply voltage;
Characterized in that said means for controlling the speed comprises:
a reference field effect transistor of said given conductivity type for generating an analog reference signal that tracks the effect of at least one of said factors on said switching speed, and an analog-to-digital converter that receives said analog reference signal and produces digital control signals therefrom;
wherein said reference field effect transistor of said given conductivity type has a gate connected to a power supply voltage conductor for causing a saturation drain current to flow that is proportional to the saturation drain current through said buffer output field effect transistor;
and wherein said buffer output field effect transistor comprises multiple source/drain regions that are independently-controllable by means of multiple gate electrodes, whereby portions of said transistor are rendered active, or alternatively inactive, by said digital control signals.

2 more elements

An integrated circuit comprising an N-channel buffer output field effect transistor for pulling a buffer output node toward a ground voltage level (V.sub.SS), and means for controlling the switching speed of said transistor to compensate for variations in at least one of the factors of:

manufacturing process, operating temperature, and power supply voltage;
Characterized in that said means for controlling the speed comprises:
a reference N-channel field effect transistor for generating an analog reference signal that tracks the effect of at least one of said factors on said switching speed, said reference transistor having its source connected to a ground power supply voltage conductor (V.sub.SS), and its gate connected to a positive power supply voltage conductor (V.sub.DD);
and further comprises an analog-to-digital converter that receives said analog reference signal and produces digital control signals therefrom, said converter comprising at least two comparators that receive said analog reference signal at a first comparator input, and a reference voltage at a second comparator input;
and wherein said buffer output field effect transistor comprises multiple source/drain regions that are independently-controllable by means of multiple gate electrodes, whereby portions of said transistor are rendered active, or alternatively inactive, by said digital control signals.

2 more elements

Dependencies are inferred from the claim text.

Automatic control of buffer speed

Life of this patent

Automatic control of buffer speed

Life of this patent

Abstract

Claims15