Integrated circuit and layout system therefor
AssigneeNEC Corporation
InventorNaoya Takahashi
Life of this patent
Estimating the term…
Abstract
In the chip layout of an LSI, a layout near bonding pads is efficiently optimized. Especially in a chip having a large number of pins, an increase in chip size caused by pad necks can be prevented. Normal functional macro-blocks are arranged in an inner region of the LSI. On the other hand, input/output blocks including corner blocks are arranged at the peripheral portion of the LSI. In addition, pads separated from the input/output blocks are arranged on the LSI including portions near the corner blocks, and the input/output blocks and the pads are connected to each other through wiring lines.
Claims11
An integrated circuit comprising:
- a plurality of macro-blocks arranged in an inner region of a semiconductor chip;
- a plurality of input/output blocks arranged at a peripheral portion of said macro-blocks;
- bonding pads respectively arranged between said input/output blocks and an outer frame of said semiconductor chip;
- a first layout obtained by performing predetermined wiring between said macro-blocks and between said macro-blocks and said input/output blocks;
- a second layout obtained by performing wiring between said input/output blocks and said corresponding bonding pads,
- wherein said bonding pads are arranged near corners of said semiconductor chip, and said second layout has a bent wiring pattern between input/output blocks corresponding to said bonding pads arranged near the corners of said semiconductor chip,
- wherein said input/output blocks and said bonding pads corresponding to said input/output blocks respectively include terminals each having a wiring drawing position set on a basis of relationships between said input/output blocks and said bonding pads, and wherein said bonding pads are connected to said input/output blocks such that said terminals are connected to each other through wiring lines,
- a shape and a drawing direction of a wiring of said second layout being determined by a positional relationship between said input/output blocks and said bonding pads corresponding to said input/output blocks, said input/output blocks being arranged at positions near said bonding pads corresponding to said input/output blocks.
A layout system for an integrated circuit, comprising:
- input/output block arranging means for initially arranging a plurality of input/output blocks at a peripheral portion of a semiconductor chip, separating bonding pads from said input/output blocks, and arranging the separated bonding pads between said input/output blocks and an outer frame of said semiconductor chip;
- functional macro-block arranging means for arranging a plurality of functional macro-blocks in an inner region of said semiconductor chip;
- interwiring means for performing wiring between said bonding pads and said corresponding input/output blocks;
- and
- interwiring means for performing predetermined wiring between said functional macro-blocks and between said functional macro-blocks and said input/output blocks, wherein said interwiring means includes wiring pattern determining means for determining a wiring shape.
A layout system for an integrated circuit, comprising:
- input/output block arranging means for initially arranging a plurality of input/output blocks at a peripheral portion of a semiconductor chip, separating bonding pads from said input/output blocks, and arranging the separated bonding pads between said input/output blocks and an outer frame of said semiconductor chip;
- functional macro-block arranging means for arranging a plurality of functional macro-blocks in an inner region of said semiconductor chip;
- interwiring means for performing wiring between said bonding pads and said corresponding input/output blocks;
- and
- interwiring means for performing predetermined wiring between said functional macro-blocks and between said functional macro-blocks and said input/output blocks,
- wherein said interwiring means for performing wiring between said input/output blocks and said bonding pads includes wiring pattern determining means for determining a wiring shape and a drawing direction on a basis of positional relationships between said input/output blocks and said bonding pads, terminal setting means for setting terminals on wiring line drawing sides determined by said wiring pattern setting means, and wiring means for forming wiring lines for connecting said terminals set by said terminal setting means.
Dependencies are inferred from the claim text.