One-time, voltage-programmable, logic element
AssigneeMicron Technology, Inc.
InventorsTyler A. Lowrey, Ruojia Lee
Life of this patent
Estimating the term…
Abstract
A one-time, voltage-programmable, logic element has an antifuse element constructed within a trench etched in a silicon substrate. A sidewall of the trench abuts a diffusion region. The trench is lined with a nitride dielectric layer, which is in turn covered by polycrystalline silicon. The polycrystalline silicon serves as a voltage reference line. In a preferred embodiment, the diffusion region forms a first source/drain region of a field-effect transistor. In order to program the element, a voltage sufficient to rupture the nitride dielectric layer is applied between the diffusion region and the reference line. The transistor is utilized to isolate a particular logic element from other logic elements.
Claims6
A one-time, voltage-programmable logic element comprising:
- an insulated-gate, field-effect transistor, said transistor having a channel region within a semiconductor substrate, and first and second source/drain regions interconnected by said channel region, said first source/drain region being coupled to an output line;
- a trench within said substrate abutting said second source/drain region;
- a dielectric layer which lines said trench;
- a conductive plug within said trench, said dielectric layer being disposed between said plug and said second source/drain region, and said conductive plug being coupled to a reference voltage,
A pair of one-time voltage-programmable logic elements comprising:
- a pair of spaced-apart insulated-gate, field-effect transistors, each of said transistors having a gate which overlies and defines a channel region within a semiconductor substrate, said gate being dielectrically insulated from said substrate, each of said transistors also having first and second source/drain regions interconnected by that transistor's channel region, said first source/drain region of each transistor being coupled to an output line;
- a trench extending downwardly into the substrate between said pair of transistors, said trench abutting said first source/drain region of each transistor;
- a dielectric layer which lines said trench;
- and
- a conductive plug which fills said trench and extends upwardly from the substrate, said plug being dielectrically insulated from the gate of each transistor, said dielectric layer being disposed between said plug and said second source/drain region of each transistor, said conductive plug being coupled to a reference voltage.
Dependencies are inferred from the claim text.