US 5,331,190 A · Semiconductor device including nonvolatile memories

Abstract

The present invention provides nonvolatile semiconductor memory which has advantages permitting the cell of the memory circuit to integrate, the memory circuit to be easy to manufacture, and the manufacturing expense to be cut down. The nonvolatile memory (21) comprises a P type well for which a N+ type source (4) and a N+ type drain (3) is provided. A surface of a space between the source (4) and the drain (3) comprises a first portion (10a) and a second portion (10b). An insulating layer (6) for holding electrons spans the surface of the space. A memory gate electrode (5) is on the insulating layer (6) and spans the first portion (10a). The surface of the second portion (10b) and a part of the surface of the memory gate electrode (5) is covered with a first region electrode (24) attaching to the source (4). But the first region electrode (24) is insulated from the memory gate electrode (5) with the insulating layer (8).

Claims20

Dependent claims

A semiconductor device including nonvolatile memories comprising:

a) a substrate of semiconductor,
b) a first region formed in the surface of the substrate,
c) a second region formed in the surface of the substrate and defining a space between the first region and the second region, the surface of the space comprising a first portion and a second portion,
d) an insulating layer for holding electrons spanning the first portion and the second portion,
e) a control electrode being on the insulating layer and spanning the first portion, and
f) a first region electrode attaching to the first region, spanning the second portion and being electrically disconnected from the control electrode.

3 more elements

A method for operating a semiconductor device including nonvolatile memories, said semiconductor device including nonvolatile memories comprising:

a substrate of semiconductor,
a first region formed in the surface of the substrate,
a second region formed in the surface of the substrate and defining a space between the first region and the second region, the surface of the space comprising a first portion and a second portion,
an insulating layer for holding electrons spanning the first portion and the second portion,
a control electrode being on the insulating layer and spanning the first portion, the control electrode having a side surface, and
a conductive body which spans the second portion adjacent to the side surface of the control electrode, the conductive body being electrically disconnected from the control electrode,
wherein the first region is a source, the second region is a drain and the control electrode is a memory gate electrode,
said method for operating comprising steps of:
a) arraying the nonvolatile memories in rows and columns,
b) connecting each of a plurality of drain lines to all the drains of the nonvolatile memories arrayed in a row,
c) connecting each of a plurality of gate lines to all the memory gate electrodes of the said nonvolatile memories arrayed in a column,
d) connecting a source line to the sources of all the nonvolatile memories arrayed in rows and columns,
e) to write data into a desired nonvolatile memory, applying a programming voltage to the gate line connecting with the desired nonvolatile memory and applying a voltage to the drains of the undesired nonvolatile memories in order not to write data into the undesired nonvolatile memories, and
f) to read data from a desired nonvolatile memory, determining whether or not a current flows through a drain line connecting to the drain of the desired nonvolatile memory when a sense voltage is applied to a gate line connecting with the memory gate electrode of the desired nonvolatile memory as well as applying a reading voltage to the source line.

11 more elements

Dependencies are inferred from the claim text.

Semiconductor device including nonvolatile memories

Life of this patent

Semiconductor device including nonvolatile memories

Life of this patent

Abstract

Claims20