Semiconductor memory device and method for producing it

A semiconductor memory device in which a memory cell section and a peripheral circuit section are formed on one and the same substrate and in which the source regions and the drain regions of MOS transistors of said memory cell section and the peripheral circuit section consist in high concentration impurity regions and low concentration impurity regions, characterized in that

• each of said MOS transistors has a first sidewall formed on a lateral side of a gate electrode formed on the substrate via a gate insulating film, and a second sidewall formed on an outer side of said first sidewall,
• the low concentration impurity regions of the source regions and the drain regions of the MOS transistors are formed by being delimited by the ends of the gate electrodes and by the periphery of said high concentration impurity regions,
• the high concentration impurity regions of the source region and the drain region of the MOS transistor of said peripheral circuit section are formed by being delimited by said first sidewall, and in that
• the high concentration impurity regions of the source region and the drain region of the MOS transistor of said memory cell section are formed by being delimited by said second sidewall.