Antifuse with nonstoichiometric tin layer and method of manufacture thereof
AssigneeCrosspoint Solutions, Inc.
InventorPankaj Dixit
Life of this patent
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Abstract
An antifuse in an integrated circuit which has first and second conducting lines, a semiconductor layer of amorphous silicon between the first and second conducting lines, and a barrier metal layer of TiN between the semiconductor layer and the first conducting layer is disclosed. The TiN layer is nonstoichiometric composition to enhance the probability of said antifuse having a desired resistance when said antifuse is programmed. More specifically, the TiN layer has a composition of Ti.sub.1.0 N.sub.0.5-0.8.
Claims13
In an integrated circuit an antifuse comprising first and second conducting lines;
- a semiconductor layer between said first and second conducting lines;
- and
- a barrier metal layer of TiN between said semiconductor layer and said first conducting layer, said TiN layer being of nonstoichiometric composition;
- whereby the probability of said antifuse having a desired resistance when said antifuse is programmed is enhanced.
In an integrated circuit having a semiconductor substrate and an insulating layer formed thereover, an antifuse comprising
- a first metal interconnection layer on said insulating layer;
- a first barrier metal layer on said first metal conducting layer;
- a semiconductor layer on said first barrier metal layer;
- a second barrier metal layer on said semiconductor layer;
- and
- a second metal interconnection layer on said second barrier metal layer;
- at least one of said barrier metal layers formed by nonstoichiometric composition of TiN whereby the probability of said antifuse having a desired resistance when said antifuse is programmed is enhanced.
Dependencies are inferred from the claim text.