Method of integrated circuit manufacturing using deposited oxide
AssigneeAT&T Bell Laboratories
InventorsAjit S. Manocha, Virendra V. S. Rana, James F. Roberts, Ankineedu Velaga
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Abstract
Contamination of LPCVDBP TEOS films is reduced by preventing volatile compounds, resulting from reactions of the residue in the outlet of the furnace from reaching the deposition portion of the furnace where they would otherwise react with the deposition gases to produce chemically generated particles which contaminate the dielectric film.
Claims1
A method of integrated circuit manufacture comprising the step of depositing a dielectric on wafers in a furnace by chemical vapor deposition, said dielectric comprising BPTEOS, comprising the further step of preventing the deposition of unwanted chemically generated particles on said dielectric in the deposition furnace, said preventing is by using a load locked chamber when wafers are loaded or unloaded from the furnace.
Dependencies are inferred from the claim text.