Integrated circuit employing inverse transistors

Current source circuitry comprising:

• a vertical bipolar transistor structure comprising first and second separate and spaced apart regions of a first conductivity type formed within a third region of a second conductivity type which is opposite that of the first conductivity type, the third region being formed within a portion of a fourth region of the first conductivity type;
• the first and second regions being separated from each other and from the fourth region by portions of the third region;
• the vertical bipolar structure being adapted to be operated such that positive current flows from the first and second regions through the third region and into the fourth region;
• the first region being coupled to the third region and to first means for supplying current to the first region;
• the second region being coupled to a load terminal to which a load element is connectable;
• a common surface area of the second and third regions being a multiple of a common surface area of the first and third regions such that with a load element connected to the load terminal, a current level is selectively established during operation of the circuitry through the load element and through the second, third and fourth regions which is a multiple of the current flowing from the first region into the third and fourth regions.

In combination:

• first and second power terminals for the application therebetween of an operating potential;
• a load element having first and second terminals for the application therebetween of an operating potential;
• the first terminal of the load element being coupled to the first power terminal;
• and
• a relatively constant current source coupled between the second terminal of the load element and the second power terminal comprising a vertical bipolar transistor operated in the inverse mode with an inverse emitter (collector) thereof coupled to the second power terminal, the voltage drop between the inverse emitter and the inverse collector being substantially less than the voltage drop therebetween when the transistor is operated in a normal mode;
• in which said relatively constant current source comprises:
• a reference transistor having a base, an inverse emitter (collector) and an inverse collector (emitter) with the base and inverse collector of the reference transistor being common to the base and inverse collector, respectively, of the vertical bipolar transistor;
• means coupled between the first power terminal and the inverse emitter of the reference transistor for supplying a reference current into the inverse emitter and via an inverse emitter-to-inverse collector path of the reference transistor to the second power terminal;
• and
• means coupled between the inverse emitter of the reference transistor and its base.

A current mirror comprising:

• first and second bipolar transistors of the same conductivity type, each transistor having first and second regions defining the ends of a main conduction path and a base, and each transistor, when operated in the normal mode with the base forward biased with respect to the first region by a constant current and with the second region at a potential which is positive with respect to the first region, exhibits in the "linear" region a voltage between the first and second region denoted as VCEn, and each transistor, when operated in an inverse mode with the base thereof forward biased with respect to the second region by a constant current and with the first region at a potential which is positive with respect to the second region, exhibits in the "linear" region voltage between the first and second regions denoted as VCEi, where VCEi is substantially less than VCEn;
• and
• means interconnecting the first and second transistors for operating them in the inverse mode comprising:
• (a) means for connecting the second region of the first and second transistors to a point of reference potential;
• (b) means connecting the bases of the first and second transistors in common to the first region of the first transistor;
• (c) means for supplying a first reference current to the first region of the first transistor;
• and
• (d) means coupled to the first region of the second transistor for conducting a current which is proportional to the amplitude of the first reference current.

Circuitry comprising:

• first and second transistors operated in the inverse mode, each transistor having a base, an inverse emitter region and an inverse collector region;
• the base region of the first and second transistors being connected together, and the inverse collector region of the first and second transistors being connected in common and to a first terminal;
• a third transistor having a base, an emitter and a collector;
• means connecting the base of the third transistor to the inverse emitter region of the first transistor;
• means connecting the emitter of the third transistor to the bases of the first and second transistors;
• and
• means for supplying a reference current to the base of the third transistor and the inverse emitter of the first transistor for producing an output current at the inverse emitter of the second transistor which is proportional to the reference current.