Semiconductor device having structures to reduce stress notching effects in conductive lines and method for making the same

A semiconductor device having structures to reduce stress notching effects in conductive lines comprising:

• a semiconductor substrate;
• a plurality of active conductive lines overlying the semiconductor substrate, wherein the lines run substantially parallel to one another in a portion of the device, lie substantially in a common plane of the device, and are separated one from another by a space of a first width;
• a first and a second outermost conductive line adjacent opposing sides of the plurality of active conductive lines, each outermost conductive line being within the common plane, parallel to the plurality of active conductive lines, and separated from the plurality of active conductive lines by a space having the first width;
• and
• an insulating layer overlying the plurality of active conductive lines and the first and second outermost conductive lines;
• wherein the first and second outermost conductive lines are each substantially wider than each line of the plurality of active conductive lines;
• and
• wherein any other conductive lines within the common plane which are parallel to the plurality of active conductive lines are separated from the first and second outermost conductive lines by a space greater than the first width.