Semiconductor integrated circuit having annular power supply with plural lines

A semiconductor integrated circuit device having a plurality of logic circuit blocks of different sizes which are designed in advance on a logical function basis, comprising:

• a first logic circuit block provided on a substrate;
• a second logic circuit block being smaller than said first logic circuit block and provided on said substrate;
• an annular power supply line including a first power supply line extending in a first direction and a second power supply line extending in a second direction crossing said first direction and connected to said first power supply line, and so provided on said substrate as to surround said first logic circuit block;
• a first power supply connecting line so provided on said substrate as to connect said first logic circuit block to said first power supply line and to extend in said second direction;
• and
• a second power supply connecting line so provided on said substrate as to connect said second logic circuit block to said second power supply line and to extend in said first direction.

A method of designing a layout of a semiconductor integrated circuit device having a plurality of logic circuit blocks of different sizes which are designed in advance on a logical function basis, comprising the steps of:

• providing a first logic circuit block on a substrate;
• providing a second logic circuit block smaller than said first logic circuit block on said substrate;
• providing an annular power supply line on said substrate so that it surrounds said first logic circuit block, the annular power supply line including a first power supply line extending in a first direction and a second power supply line extending in a second direction crossing said first direction and connected to said first power supply line, and said first power supply line including an interconnecting line portion extending in said first direction and divided into a plurality of lines;
• and
• providing a power supply connecting line on said substrate so that it connects said second logic circuit block to said annular power supply line and extends in said first direction.

A method of designing a layout of a semiconductor integrated circuit device having a plurality of logic circuit blocks of different sizes which are designed in advance on a logical function basis, comprising the steps of:

• providing a first logic circuit block on a substrate;
• providing a second logic circuit block, smaller than said first logic circuit block, on said substrate;
• providing an annular power supply line on said substrate so that it surrounds said first logic circuit block, the annular power supply line including a first power supply line extending in a first direction and a second power supply line extending in a second direction, crossing said first direction, and connected to said first power supply line, said first power supply line including an interconnecting line portion extending in said first direction and divided into a plurality of lines;
• and
• providing a power supply connecting line on said substrate so that it connects said second logic circuit block to said annular power supply line and extends in said first direction,
• said power supply connecting line being so provided as to be aligned with said first power supply line.