Semiconductor memory device

A method of making a memory cell having a transistor and a stacked capacitor, comprising the steps of:

• (a) forming a first conductive film over a semiconductor substrate after an insulating film has been deposited over the transistor formed on said semiconductor substrate and a contact hole has subsequently been formed in said insulating film;
• (b) forming a first mask pattern on said first conductive film and anisotropically etching substantially halfway said first conductive film, with said first mask pattern used as a mask, so as to leave a bottom thereof;
• (c) forming a second mask film only on a side wall portion of said first conductive film which has been formed by a partial etching, and depositing a second conductive film over an entire surface of said second mask film;
• (d) anisotropically etching an entire surface of said second conductive film so as to leave a portion of said second conductive film on a side wall portion of said second mask film while permitting said second conductive film to be connected with the bottom of said first conductive film;
• (e) removing a bottom portion of said first conductive film which fails to be covered by said second conductive film, said second mask film and said first mask pattern;
• and
• (f) after said first mask pattern and said second mask film have been removed, forming a capacitor insulating film over an entire surface followed by a formation of a third conductive film over said capacitor insulating film, whereby lower and upper electrodes of the capacitor are formed by said first and second conductive films, respectively.