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US 5,313,084 AGranted
Interconnect structure for an integrated circuit
AssigneeSGS-Thomson Microelectronics S.A.
InventorChe-Chia Wei
Life of this patent
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Abstract
A local interconnect structure for an integrated circuit is formed from a patterned refractory metal silicide. The local interconnect has an overlying oxide layer, which prevents part of the amorphous silicon used to form the interconnect from becoming silicided. This results in a local interconnect layer which has thinner silicide portions than silicide regions formed over adjacent source/drain regions and gate electrodes.
Claims4
An interconnect structure for an integrated circuit, comprising:
- a semiconductor substrate;
- a source/drain region within the substrate;
- a field oxide region covering a portion of a surface of the substrate adjacent the source/drain region;
- a conductive electrode lying on a portion of the field oxide region;
- a local interconnect layer contacting the source drain region and the conductive electrode on the field oxide region, wherein the local interconnect layer is formed from a refractory metal silicide and has a relatively uniform thickness throughout;
- a silicon buffer layer overlying and directly contacting the local interconnect layer and co-extensive therewith;
- an oxide layer overlying and directly contacting the buffer layer and co-extensive therewith;
- and
- refractory metal silicide regions overlying the source/drain region and the conductive electrode, wherein such refractory metal silicide regions have a thickness greater than the thickness of the local interconnect layer.
6 more elements
Dependencies are inferred from the claim text.