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US 5,312,781 AGranted
Flash EEPROM fabrication process that uses a selective wet chemical etch
AssigneeAT&T Bell Laboratories
InventorsRichard W. Gregor, Chung W. Leung
Life of this patent
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Abstract
A method for wet etching disposable spacers in silicon integrated circuits is provided. Illustratively, a pair of spacers is formed over a polysilicon substrate. A second pair of spacers is formed from doped silicon dioxide over the first pair of spacers. Then the second pair of spacers is etched away with NH.sub.4 OH/H.sub.2 O.sub.2, thus providing a means for defining the underlying polysilicon layer, e.g., by etching.
Claims5
A method of fabricating a semiconductor device comprising:
- forming a first dielectric layer of BPTEOS overlying polysilicon substrate;
- wet etching said first dielectric layer;
- CHARACTERIZED IN THAT said wet etching is accomplished with NH.sub.4 OH/H.sub.2 O.sub.2.
Dependencies are inferred from the claim text.