Method of manufacturing semiconductor device including formation of alignment mark
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorKakutaro Suda
Life of this patent
Estimating the term…
Abstract
A p.sup.- semiconductor substrate has a surface which is high in a memory cell region and low in a peripheral circuit region. An n.sup.+ buried semiconductor layer of uniform thickness is formed on the substrate. An n.sup.- epitaxial layer formed on the buried semiconductor layer is thin in the memory cell region and thick in the peripheral circuit region, so that the surface of the epitaxial layer can be flat. A concave or convex step is formed on the surface of the epitaxial layer in a boundary portion between the memory cell region and the peripheral circuit region in order to use it as an alignment mark in a later processing step.
Claims15
A method of manufacturing a semiconductor device, comprising the steps of:
- (a) preparing a first conductivity type semiconductor substrate;
- (b) selectively removing a surface of said semiconductor substrate to thereby provide said semiconductor substrate with a first region formed with a relatively high surface and a second region adjacent to the first region and formed with a relatively low surface;
- (c) forming a second conductivity type buried semiconductor layer of a relatively high impurity concentration with substantially uniform thickness formed on said semiconductor substrate in said first and second regions;
- (d) growing a second conductivity type epitaxial layer of a relatively low impurity concentration in substantially uniform thickness on said buried semiconductor layer;
- and
- (e) selectively removing said epitaxial layer in said first region to thereby equalize the height of a portion of the surface of said epitaxial layer in said first and second regions, and to provide said surface of said epitaxial layer with a concave or convex step in a boundary portion between said first and second regions.
Dependencies are inferred from the claim text.