Semiconductor wafer cassette mapper having dual vertical column of light emitting apertures and a single vertical column of light receiving apertures

A wafer cassette mapper for detecting the presence or absence of a planar wafer in each of a plurality of corresponding pairs of slots along opposite sides of a wafer cassette, the wafer cassette mapper comprising:

• a base member for supporting a wafer cassette having a plurality of corresponding evenly-spaced slots located along opposite sides of the wafer cassette, each of the corresponding evenly-spaced slots being adapted to receive and retain a single planar wafer, the base member including cassette engagement means for receiving said wafer cassette;
• a transmitter/receiver module mounted on said base member adjacent a rear edge of said wafer cassette, said transmitter/receiver module including two vertical columns of light emitting apertures, horizontally aligned as pairs of light emitting apertures, and a light transmitter array coupled thereto, said transmitter/receiver module further including a single vertical column of light receiving apertures, positioned between said two vertical columns of light emitting apertures, and a light receiver array coupled thereto, each of the light receiving apertures being horizontally aligned with an associated pair of said light emitting apertures, each pair of light emitting apertures and the associated light receiving aperture being aligned with the plane of an associated wafer when positioned in its corresponding slots, each pair of light emitting apertures being positioned at an angle to each other such that beams of light emitted therefrom intersect at a focal point on a rear edge of the associated wafer;
• and
• control means, coupled to said light transmitter array and said light receiver array, for selectively activating said light transmitter array for a predetermined period of time and for selectively interrogating said light receiver array during that period of time to obtain status information therefrom, said control means including logic means responsive to the status information obtained from said light receiver array for determining the presence or absence of a wafer in each of the plurality of corresponding pairs of slots of said wafer cassette.