Method of manufacturing a contact of a highly integrated semiconductor device

A method of manufacturing a contact of a highly integrated semiconductor device, comprising the steps of:

• forming a MOS transistor having gate, source, and drain electrodes and a field oxide on a silicon substrate;
• forming a first insulating layer that completely covers said MOS transistor and field oxide;
• forming a polyimide pattern only on contact areas located on top of the source electrode and drain electrode after coating a photo-sensitive polyimide over the first insulating layer;
• forming a second insulating layer over the device, particularly on said polyimide pattern and then forming a second insulating layer pattern by carrying out an etch back process until a surface of said polyimide pattern is exposed;
• removing the exposed polyimide pattern using a plasma etching process;
• forming a spacer on side walls of the gate electrode by carrying out a blanket etching process on the first insulating layer that has been exposed by said plasma etching process while simultaneously forming contact areas where the source electrode and the drain electrode are exposed;
• depositing a polysilicon layer over the second insulating layer pattern and forming several polysilicon pads that are in contact with the drain electrode or the source electrode by carrying out an etch back process until a surface of the second insulating layer pattern is exposed;
• depositing a third insulating layer over the device, including said polysilicon pads;
• and
• exposing each of said several polysilicon pads by removing a portion of the third insulating layer and depositing a conducting layer in contact with the exposed polysilicon pad.