US 5,293,057 AGranted

Electrostatic discharge protection circuit for semiconductor device

AssigneeMicron Technology, Inc.

InventorsFan Ho, Mitchel A. Daher

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Abstract

An ESD protection circuit (38) for a MOS device uses at least one electrically floating-base N+P-N+ transistor (43) connected between a metal bonding pad (40) and ground. The electrically floating base region (44) of each transistor is formed by a thin oxide region deposited over a substrate (50) of the MOS device. Because its N+ regions (42, 45) are made symmetrical about the floating base, each transistor conducts ESD pulses of both polarities equally. The beta of each transistor is made sufficiently large to withstand short-duration ESD current spikes. Current density is minimized by diffusing a deep N- well (54, 56) into each N+ region of each transistor to provide a larger effective conducting area. Low capacitance and higher breakdown voltage are achieved by eliminating the gate structure of prior art FET-based protection circuits.

Claims10

Dependent claims

An ESD protection structure for a MOS device having a bonding pad and a P- substrate, comprising:

a symmetrical elongated bi-polar transistor fabricated on and in the P- substrate, the bi-polar transistor comprising an electrically floating elongated base region having a width less than two microns;
a first N+ semiconductor region formed in the substrate adjacent to a first edge margin of the elongated base region;
a first N- well having a depth greater than two microns formed in the first N+ semiconductor region;
a second N+ semiconductor region formed in the substrate adjacent to a second edge margin of the elongated base region;
a second N- well having a depth greater than two microns formed in the second N+ semiconductor region;
the first N- well electrically connected to an internal circuit of the MOS device and at a plurality of points to the bonding pad;
and
the second N- well electrically connected at a plurality of points to a ground line,
whereby, upon receipt of an ESD pulse, the ESD protection structure undergoes an avalanche breakdown that effectively conducts the ESD pulse between the bonding pad and the ground line and away from the internal circuit.

6 more elements

Dependencies are inferred from the claim text.